| Message ID | 20190312152256.35574-1-icenowy@aosc.io (mailing list archive) |
|---|---|
| Headers | show |
| Series | Support for Allwinner V3/S3L and Sochip S3 | expand |
On Tue, Mar 12, 2019 at 10:24 PM Icenowy Zheng <icenowy@aosc.io> wrote:
> This patchset tries to add support for Allwinner V3/S3L and Sochip S3.
I see there is some review comments on this patch set so I am waiting
for v2.
When we have something Maxime, Rob etc has ACKed, I suggest I merge
the pinctrl stuff into an immutable branch in the pinctrl tree so that it can
be pulled in to ARM SoC if need be (for DTS files to compile for example).
Yours,
Linus Walleij
This patchset tries to add support for Allwinner V3/S3L and Sochip S3. Allwinner V3/V3s/S3L and Sochip S3 share the same die, but with different package. V3 is BGA w/o co-packaged DDR, V3s is QFP w/ DDR2, S3L is BGA w/ DDR2 and S3 is BGA w/ DDR3. (S3 and S3L is compatible for pinout, but because of different DDR, DDR voltage is different between the two variants). Because of the pin count of V3s is restricted due to the package, some pins are not bound on V3s, but they're bound on V3/S3/S3L. Currently the kernel is only prepared for the features available on V3s. This patchset adds the features missing on V3s for using them on V3/S3/S3L, and add bindings for V3/S3/S3L. It also adds a S3L device, the Pine64 Single Cube Computer. The S3/S3L SoM by Sipeed (formerly Lichee Pi), called Lichee Nano Plus, is ongoing. Icenowy Zheng (14): dt-bindings: pinctrl: add missing compatible string for V3s pinctrl: sunxi: rename V3s driver to V3 driver dt-bindings: pinctrl: add compatible string for Allwinner V3 pinctrl pinctrl: sunxi: v3: really introduce support for V3 clk: sunxi-ng: v3s: add the missing PLL_DDR1 dt-bindings: clock: sunxi-ccu: remove bogus + before R40 compatible dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU clk: sunxi-ng: v3s: add Allwinner V3 support dt-bindings: vendor-prefixes: add SoChip dt-bindings: arm: sunxi: add compatible string for V3/S3/S3L SoCs ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TX ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support ARM: dts: sun8i: s3l: add support for Pine64 Single Cube Computer .../devicetree/bindings/arm/sunxi.txt | 3 + .../devicetree/bindings/clock/sunxi-ccu.txt | 3 +- .../pinctrl/allwinner,sunxi-pinctrl.txt | 2 + .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-s3.dtsi | 6 + .../dts/sun8i-s3l-single-cube-computer.dts | 166 ++++++++++ arch/arm/boot/dts/sun8i-s3l.dtsi | 6 + arch/arm/boot/dts/sun8i-v3.dtsi | 27 ++ arch/arm/boot/dts/sun8i-v3s.dtsi | 59 ++++ drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 244 ++++++++++++++- drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 6 +- drivers/pinctrl/sunxi/Kconfig | 2 +- drivers/pinctrl/sunxi/Makefile | 2 +- ...pinctrl-sun8i-v3s.c => pinctrl-sun8i-v3.c} | 291 ++++++++++++++++-- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 2 + include/dt-bindings/clock/sun8i-v3s-ccu.h | 4 + include/dt-bindings/reset/sun8i-v3s-ccu.h | 3 + 18 files changed, 799 insertions(+), 29 deletions(-) create mode 100644 arch/arm/boot/dts/sun8i-s3.dtsi create mode 100644 arch/arm/boot/dts/sun8i-s3l-single-cube-computer.dts create mode 100644 arch/arm/boot/dts/sun8i-s3l.dtsi create mode 100644 arch/arm/boot/dts/sun8i-v3.dtsi rename drivers/pinctrl/sunxi/{pinctrl-sun8i-v3s.c => pinctrl-sun8i-v3.c} (51%)