diff mbox series

[2/2] x86/acpi: Improve suspend and resume process for Zhaoxin CPU

Message ID 1554779388-3769-1-git-send-email-fionali-oc@zhaoxin.com (mailing list archive)
State New, archived
Headers show
Series None | expand

Commit Message

FionaLi-oc April 9, 2019, 3:09 a.m. UTC 
When executing SYSEXIT or SYSENTRY in Zhaoxin CPU, CPU needs to
save or restore a set of MSRs.

Signed-off-by: FionaLi-oc <fionali-oc@zhaoxin.com>
---
 xen/arch/x86/acpi/suspend.c | 6 ++++--
 xen/arch/x86/x86_64/traps.c | 3 ++-
 2 files changed, 6 insertions(+), 3 deletions(-)

Comments

Andrew Cooper April 9, 2019, 9:05 a.m. UTC | #1 
On 09/04/2019 04:09, FionaLi-oc wrote:
> When executing SYSEXIT or SYSENTRY in Zhaoxin CPU, CPU needs to
> save or restore a set of MSRs.
>
> Signed-off-by: FionaLi-oc <fionali-oc@zhaoxin.com>

These changes look fine overall, but please rebase them onto the staging
branch.

In particular,
http://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=0cd074144cbb32de53e98eaad7d0ecd9259f219b
which is a recent patch of mine (to help Hygon) ought to simplify the patch.

Thanks,

~Andrew
diff mbox series

Patch

diff --git a/xen/arch/x86/acpi/suspend.c b/xen/arch/x86/acpi/suspend.c
index 00e6012..bcff672 100644
--- a/xen/arch/x86/acpi/suspend.c
+++ b/xen/arch/x86/acpi/suspend.c
@@ -28,7 +28,8 @@  void save_rest_processor_state(void)
     rdmsrl(MSR_CSTAR, saved_cstar);
     rdmsrl(MSR_LSTAR, saved_lstar);
     if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ||
-         boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR )
+         boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR ||
+         boot_cpu_data.x86_vendor == X86_VENDOR_SHANGHAI )
     {
         rdmsrl(MSR_IA32_SYSENTER_ESP, saved_sysenter_esp);
         rdmsrl(MSR_IA32_SYSENTER_EIP, saved_sysenter_eip);
@@ -53,7 +54,8 @@  void restore_rest_processor_state(void)
     wrmsrl(MSR_SHADOW_GS_BASE, saved_kernel_gs_base);
 
     if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ||
-         boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR )
+         boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR ||
+         boot_cpu_data.x86_vendor == X86_VENDOR_SHANGHAI )
     {
         /* Recover sysenter MSRs */
         wrmsrl(MSR_IA32_SYSENTER_ESP, saved_sysenter_esp);
diff --git a/xen/arch/x86/x86_64/traps.c b/xen/arch/x86/x86_64/traps.c
index bf7870e..30d7012 100644
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -335,7 +335,8 @@  void subarch_percpu_traps_init(void)
     stub_va += offset;
 
     if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ||
-         boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR )
+         boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR ||
+         boot_cpu_data.x86_vendor == X86_VENDOR_SHANGHAI )
     {
         /* SYSENTER entry. */
         wrmsrl(MSR_IA32_SYSENTER_ESP, stack_bottom);