| Message ID | 1556532194-27904-3-git-send-email-gerald.baeza@st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | stm32-ddr-pmu driver creation | expand |
On Mon, Apr 29, 2019 at 10:03:37AM +0000, Gerald BAEZA wrote: > The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC. > > This documentation indicates how to enable stm32-ddr-pmu driver on > DDRPERFM peripheral, via the device tree. > > Signed-off-by: Gerald Baeza <gerald.baeza@st.com> > --- > .../devicetree/bindings/perf/stm32-ddr-pmu.txt | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt > > diff --git a/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt > new file mode 100644 > index 0000000..dabc4c7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt > @@ -0,0 +1,18 @@ > +* STM32 DDR Performance Monitor (DDRPERFM) > + > +Required properties: > +- compatible: must be "st,stm32-ddr-pmu". > +- reg: physical address and length of the registers set. > +- clocks: list of phandles and specifiers to all input clocks listed in > + clock-names property. > +- clock-names: "bus" corresponds to the DDRPERFM bus clock and "ddr" to > + the DDR frequency. You have 'resets' in the dts. > + > +Example: > + ddrperfm: perf@5a007000 { > + compatible = "st,stm32-ddr-pmu"; > + reg = <0x5a007000 0x400>; > + clocks = <&rcc DDRPERFM>, <&rcc PLL2_R>; > + clock-names = "bus", "ddr"; > + }; > + > -- > 2.7.4
diff --git a/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt new file mode 100644 index 0000000..dabc4c7 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt @@ -0,0 +1,18 @@ +* STM32 DDR Performance Monitor (DDRPERFM) + +Required properties: +- compatible: must be "st,stm32-ddr-pmu". +- reg: physical address and length of the registers set. +- clocks: list of phandles and specifiers to all input clocks listed in + clock-names property. +- clock-names: "bus" corresponds to the DDRPERFM bus clock and "ddr" to + the DDR frequency. + +Example: + ddrperfm: perf@5a007000 { + compatible = "st,stm32-ddr-pmu"; + reg = <0x5a007000 0x400>; + clocks = <&rcc DDRPERFM>, <&rcc PLL2_R>; + clock-names = "bus", "ddr"; + }; +
The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC. This documentation indicates how to enable stm32-ddr-pmu driver on DDRPERFM peripheral, via the device tree. Signed-off-by: Gerald Baeza <gerald.baeza@st.com> --- .../devicetree/bindings/perf/stm32-ddr-pmu.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt