Message ID | 5cdae78b.1c69fb81.a32a9.870f@mx.google.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Delegated to: | Eduardo Valentin |
Headers | show |
Series | next/master boot bisection: next-20190514 on rk3288-veyron-jaq | expand |
Hi, From: kernelci.org bot <bot@kernelci.org> Date: Tue, May 14, 2019 at 9:06 AM To: <tomeu.vizoso@collabora.com>, <guillaume.tucker@collabora.com>, <mgalka@collabora.com>, <broonie@kernel.org>, <matthew.hart@linaro.org>, <khilman@baylibre.com>, <enric.balletbo@collabora.com>, Elaine Zhang, Eduardo Valentin, Daniel Lezcano Cc: Heiko Stuebner, <linux-pm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-rockchip@lists.infradead.org>, Zhang Rui, <linux-arm-kernel@lists.infradead.org> > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * > * This automated bisection report was sent to you on the basis * > * that you may be involved with the breaking commit it has * > * found. No manual investigation has been done to verify it, * > * and the root cause of the problem may be somewhere else. * > * Hope this helps! * > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * > > next/master boot bisection: next-20190514 on rk3288-veyron-jaq > > Summary: > Start: 0a13f187b16a Add linux-next specific files for 20190514 > Details: https://kernelci.org/boot/id/5cda7f2259b514876d7a3628 > Plain log: https://storage.kernelci.org//next/master/next-20190514/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.txt > HTML log: https://storage.kernelci.org//next/master/next-20190514/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.html > Result: 691d4947face thermal: rockchip: fix up the tsadc pinctrl setting error > > Checks: > revert: PASS > verify: PASS > > Parameters: > Tree: next > URL: git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > Branch: master > Target: rk3288-veyron-jaq > CPU arch: arm > Lab: lab-collabora > Compiler: gcc-8 > Config: multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y > Test suite: boot > > Breaking commit found: > > ------------------------------------------------------------------------------- > commit 691d4947faceb8bd841900049e07c81c95ca4b0d > Author: Elaine Zhang <zhangqing@rock-chips.com> > Date: Tue Apr 30 18:09:44 2019 +0800 > > thermal: rockchip: fix up the tsadc pinctrl setting error > > Explicitly use the pinctrl to set/unset the right mode > instead of relying on the pinctrl init mode. > And it requires setting the tshut polarity before select pinctrl. > > When the temperature sensor mode is set to 0, it will automatically > reset the board via the Clock-Reset-Unit (CRU) if the over temperature > threshold is reached. However, when the pinctrl initializes, it does a > transition to "otp_out" which may lead the SoC restart all the time. > > "otp_out" IO may be connected to the RESET circuit on the hardware. > If the IO is in the wrong state, it will trigger RESET. > (similar to the effect of pressing the RESET button) > which will cause the soc to restart all the time. > > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> > Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> > Signed-off-by: Eduardo Valentin <edubezval@gmail.com> I can confirm that the above commit breaks my jerry, though I haven't dug into the details. :( Is anyone fixing? For now I'm just booting with the revert. -Doug
On 16/05/2019 22:38, Doug Anderson wrote: > Hi, > > From: kernelci.org bot <bot@kernelci.org> > Date: Tue, May 14, 2019 at 9:06 AM > To: <tomeu.vizoso@collabora.com>, <guillaume.tucker@collabora.com>, > <mgalka@collabora.com>, <broonie@kernel.org>, > <matthew.hart@linaro.org>, <khilman@baylibre.com>, > <enric.balletbo@collabora.com>, Elaine Zhang, Eduardo Valentin, Daniel > Lezcano > Cc: Heiko Stuebner, <linux-pm@vger.kernel.org>, > <linux-kernel@vger.kernel.org>, <linux-rockchip@lists.infradead.org>, > Zhang Rui, <linux-arm-kernel@lists.infradead.org> > >> * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * >> * This automated bisection report was sent to you on the basis * >> * that you may be involved with the breaking commit it has * >> * found. No manual investigation has been done to verify it, * >> * and the root cause of the problem may be somewhere else. * >> * Hope this helps! * >> * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * >> >> next/master boot bisection: next-20190514 on rk3288-veyron-jaq >> >> Summary: >> Start: 0a13f187b16a Add linux-next specific files for 20190514 >> Details: https://kernelci.org/boot/id/5cda7f2259b514876d7a3628 >> Plain log: https://storage.kernelci.org//next/master/next-20190514/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.txt >> HTML log: https://storage.kernelci.org//next/master/next-20190514/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.html >> Result: 691d4947face thermal: rockchip: fix up the tsadc pinctrl setting error >> >> Checks: >> revert: PASS >> verify: PASS >> >> Parameters: >> Tree: next >> URL: git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git >> Branch: master >> Target: rk3288-veyron-jaq >> CPU arch: arm >> Lab: lab-collabora >> Compiler: gcc-8 >> Config: multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y >> Test suite: boot >> >> Breaking commit found: >> >> ------------------------------------------------------------------------------- >> commit 691d4947faceb8bd841900049e07c81c95ca4b0d >> Author: Elaine Zhang <zhangqing@rock-chips.com> >> Date: Tue Apr 30 18:09:44 2019 +0800 >> >> thermal: rockchip: fix up the tsadc pinctrl setting error >> >> Explicitly use the pinctrl to set/unset the right mode >> instead of relying on the pinctrl init mode. >> And it requires setting the tshut polarity before select pinctrl. >> >> When the temperature sensor mode is set to 0, it will automatically >> reset the board via the Clock-Reset-Unit (CRU) if the over temperature >> threshold is reached. However, when the pinctrl initializes, it does a >> transition to "otp_out" which may lead the SoC restart all the time. >> >> "otp_out" IO may be connected to the RESET circuit on the hardware. >> If the IO is in the wrong state, it will trigger RESET. >> (similar to the effect of pressing the RESET button) >> which will cause the soc to restart all the time. >> >> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> >> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> >> Signed-off-by: Eduardo Valentin <edubezval@gmail.com> > > I can confirm that the above commit breaks my jerry, though I haven't > dug into the details. :( Is anyone fixing? For now I'm just booting > with the revert. > > > -Doug I can also confirm that this breaks boot on our custom board which is very similar to the rk3288-Firefly. In my scenario the processor just seems to "hang", no reset occurs if that helps debug matters. Regards, Jack. > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip >
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 9c7643d62ed7..6dc7fc516abf 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -172,6 +172,9 @@ struct rockchip_thermal_data { int tshut_temp; enum tshut_mode tshut_mode; enum tshut_polarity tshut_polarity; + struct pinctrl *pinctrl; + struct pinctrl_state *gpio_state; + struct pinctrl_state *otp_state; }; /** @@ -1242,6 +1245,8 @@ static int rockchip_thermal_probe(struct platform_device *pdev) return error; } + thermal->chip->control(thermal->regs, false); + error = clk_prepare_enable(thermal->clk); if (error) { dev_err(&pdev->dev, "failed to enable converter clock: %d\n", @@ -1267,6 +1272,30 @@ static int rockchip_thermal_probe(struct platform_device *pdev) thermal->chip->initialize(thermal->grf, thermal->regs, thermal->tshut_polarity); + if (thermal->tshut_mode == TSHUT_MODE_GPIO) { + thermal->pinctrl = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(thermal->pinctrl)) { + dev_err(&pdev->dev, "failed to find thermal pinctrl\n"); + return PTR_ERR(thermal->pinctrl); + } + + thermal->gpio_state = pinctrl_lookup_state(thermal->pinctrl, + "gpio"); + if (IS_ERR_OR_NULL(thermal->gpio_state)) { + dev_err(&pdev->dev, "failed to find thermal gpio state\n"); + return -EINVAL; + } + + thermal->otp_state = pinctrl_lookup_state(thermal->pinctrl, + "otpout"); + if (IS_ERR_OR_NULL(thermal->otp_state)) { + dev_err(&pdev->dev, "failed to find thermal otpout state\n"); + return -EINVAL; + } + + pinctrl_select_state(thermal->pinctrl, thermal->otp_state); + } + for (i = 0; i < thermal->chip->chn_num; i++) { error = rockchip_thermal_register_sensor(pdev, thermal, &thermal->sensors[i], @@ -1337,8 +1366,8 @@ static int __maybe_unused rockchip_thermal_suspend(struct device *dev) clk_disable(thermal->pclk); clk_disable(thermal->clk); - - pinctrl_pm_select_sleep_state(dev); + if (thermal->tshut_mode == TSHUT_MODE_GPIO) + pinctrl_select_state(thermal->pinctrl, thermal->gpio_state); return 0; } @@ -1383,7 +1412,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev) for (i = 0; i < thermal->chip->chn_num; i++) rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); - pinctrl_pm_select_default_state(dev); + if (thermal->tshut_mode == TSHUT_MODE_GPIO) + pinctrl_select_state(thermal->pinctrl, thermal->otp_state); return 0; }