diff mbox series

[v11,06/12] drm/i915: Write HDR infoframe and send to panel

Message ID 1558015817-12025-7-git-send-email-uma.shankar@intel.com (mailing list archive)
State New, archived
Headers show
Series Add HDR Metadata Parsing and handling in DRM layer | expand

Commit Message

Shankar, Uma May 16, 2019, 2:10 p.m. UTC 
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.

v2: Rebase

v3: Fixed a warning message

v4: Addressed Shashank's review comments

v5: Rebase. Added infoframe calculation in compute config.

v6: Addressed Shashank's review comment. Added HDR metadata
support from GEN10 onwards as per Shashank's recommendation.

v7: Addressed Shashank's review comments

v8: Added Shashank's RB.

v9: Addressed Ville's review comments.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h  |  1 +
 drivers/gpu/drm/i915/intel_hdmi.c | 44 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)

Comments

Ville Syrjälä May 17, 2019, 2:06 p.m. UTC | #1 
On Thu, May 16, 2019 at 07:40:11PM +0530, Uma Shankar wrote:
> Enable writing of HDR metadata infoframe to panel.
> The data will be provid by usersapace compositors, based
> on blending policies and passsed to driver through a blob
> property.
> 
> v2: Rebase
> 
> v3: Fixed a warning message
> 
> v4: Addressed Shashank's review comments
> 
> v5: Rebase. Added infoframe calculation in compute config.
> 
> v6: Addressed Shashank's review comment. Added HDR metadata
> support from GEN10 onwards as per Shashank's recommendation.
> 
> v7: Addressed Shashank's review comments
> 
> v8: Added Shashank's RB.
> 
> v9: Addressed Ville's review comments.
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_drv.h  |  1 +
>  drivers/gpu/drm/i915/intel_hdmi.c | 44 +++++++++++++++++++++++++++++++++++++++
>  2 files changed, 45 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 5258abb..40e2c52 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -910,6 +910,7 @@ struct intel_crtc_state {
>  		union hdmi_infoframe avi;
>  		union hdmi_infoframe spd;
>  		union hdmi_infoframe hdmi;
> +		union hdmi_infoframe drm;
>  	} infoframes;
>  
>  	/* HDMI scrambling status */
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 92597d8..d3b8e09 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -573,6 +573,7 @@ static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,
>  	HDMI_INFOFRAME_TYPE_AVI,
>  	HDMI_INFOFRAME_TYPE_SPD,
>  	HDMI_INFOFRAME_TYPE_VENDOR,
> +	HDMI_INFOFRAME_TYPE_DRM,
>  };
>  
>  u32 intel_hdmi_infoframe_enable(unsigned int type)
> @@ -795,6 +796,41 @@ void intel_read_infoframe(struct intel_encoder *encoder,
>  	return true;
>  }
>  
> +static bool
> +intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder,
> +				 struct intel_crtc_state *crtc_state,
> +				 struct drm_connector_state *conn_state)
> +{
> +	struct hdmi_drm_infoframe *frame = &crtc_state->infoframes.drm.drm;
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	int ret;
> +
> +	if (!(INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)))
> +		return true;
> +
> +	if (!crtc_state->has_infoframe)
> +		return true;
> +
> +	if (!conn_state->hdr_output_metadata ||
> +	    conn_state->hdr_output_metadata->length == 0)

The core has already done the length check for us. So can be dropped
from here.

> +		return true;
> +
> +	crtc_state->infoframes.enable |=
> +		intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM);
> +
> +	ret = drm_hdmi_infoframe_set_hdr_metadata(frame, conn_state);
> +	if (ret < 0) {
> +		DRM_ERROR("couldn't set HDR metadata in infoframe\n");

Still a user triggreable ERROR.

> +		return false;
> +	}
> +
> +	ret = hdmi_drm_infoframe_check(frame);
> +	if (WARN_ON(ret))
> +		return false;
> +
> +	return true;
> +}
> +
>  static void g4x_set_infoframes(struct intel_encoder *encoder,
>  			       bool enable,
>  			       const struct intel_crtc_state *crtc_state,
> @@ -1180,6 +1216,9 @@ static void hsw_set_infoframes(struct intel_encoder *encoder,
>  	intel_write_infoframe(encoder, crtc_state,
>  			      HDMI_INFOFRAME_TYPE_VENDOR,
>  			      &crtc_state->infoframes.hdmi);
> +	intel_write_infoframe(encoder, crtc_state,
> +			      HDMI_INFOFRAME_TYPE_DRM,
> +			      &crtc_state->infoframes.drm);
>  }
>  
>  void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
> @@ -2386,6 +2425,11 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>  		return -EINVAL;
>  	}
>  
> +	if (!intel_hdmi_compute_drm_infoframe(encoder, pipe_config, conn_state)) {
> +		DRM_DEBUG_KMS("bad DRM infoframe\n");
> +		return -EINVAL;
> +	}
> +
>  	return 0;
>  }
>  
> -- 
> 1.9.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5258abb..40e2c52 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -910,6 +910,7 @@  struct intel_crtc_state {
 		union hdmi_infoframe avi;
 		union hdmi_infoframe spd;
 		union hdmi_infoframe hdmi;
+		union hdmi_infoframe drm;
 	} infoframes;
 
 	/* HDMI scrambling status */
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 92597d8..d3b8e09 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -573,6 +573,7 @@  static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,
 	HDMI_INFOFRAME_TYPE_AVI,
 	HDMI_INFOFRAME_TYPE_SPD,
 	HDMI_INFOFRAME_TYPE_VENDOR,
+	HDMI_INFOFRAME_TYPE_DRM,
 };
 
 u32 intel_hdmi_infoframe_enable(unsigned int type)
@@ -795,6 +796,41 @@  void intel_read_infoframe(struct intel_encoder *encoder,
 	return true;
 }
 
+static bool
+intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder,
+				 struct intel_crtc_state *crtc_state,
+				 struct drm_connector_state *conn_state)
+{
+	struct hdmi_drm_infoframe *frame = &crtc_state->infoframes.drm.drm;
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	int ret;
+
+	if (!(INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)))
+		return true;
+
+	if (!crtc_state->has_infoframe)
+		return true;
+
+	if (!conn_state->hdr_output_metadata ||
+	    conn_state->hdr_output_metadata->length == 0)
+		return true;
+
+	crtc_state->infoframes.enable |=
+		intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM);
+
+	ret = drm_hdmi_infoframe_set_hdr_metadata(frame, conn_state);
+	if (ret < 0) {
+		DRM_ERROR("couldn't set HDR metadata in infoframe\n");
+		return false;
+	}
+
+	ret = hdmi_drm_infoframe_check(frame);
+	if (WARN_ON(ret))
+		return false;
+
+	return true;
+}
+
 static void g4x_set_infoframes(struct intel_encoder *encoder,
 			       bool enable,
 			       const struct intel_crtc_state *crtc_state,
@@ -1180,6 +1216,9 @@  static void hsw_set_infoframes(struct intel_encoder *encoder,
 	intel_write_infoframe(encoder, crtc_state,
 			      HDMI_INFOFRAME_TYPE_VENDOR,
 			      &crtc_state->infoframes.hdmi);
+	intel_write_infoframe(encoder, crtc_state,
+			      HDMI_INFOFRAME_TYPE_DRM,
+			      &crtc_state->infoframes.drm);
 }
 
 void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
@@ -2386,6 +2425,11 @@  int intel_hdmi_compute_config(struct intel_encoder *encoder,
 		return -EINVAL;
 	}
 
+	if (!intel_hdmi_compute_drm_infoframe(encoder, pipe_config, conn_state)) {
+		DRM_DEBUG_KMS("bad DRM infoframe\n");
+		return -EINVAL;
+	}
+
 	return 0;
 }