diff mbox series

dmaengine: axi-dmac: Enable TLAST handling

Message ID 20190516094430.16121-1-alexandru.ardelean@analog.com (mailing list archive)
State Accepted
Headers show
Series dmaengine: axi-dmac: Enable TLAST handling | expand

Commit Message

Alexandru Ardelean May 16, 2019, 9:44 a.m. UTC 
From: Michael Hennerich <michael.hennerich@analog.com>

The TLAST flag is used by the DMAC HDL controller to signal to the
controller that the following segment (to be submitted) is the last one (in
a series of segments).

A receiver DMA (typically another DMAC) can read this parameter (from the
transfer), and terminate the transfer earlier. A typical use-case for this,
is when the receiver expects a certain amount of segments, but for some
reason (e.g. an ADC capture which can have an unknown number of digital
samples) the number of actual segments is smaller. The receiver would read
this flag, and then the DMAC would finish.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
---
 drivers/dma/dma-axi-dmac.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Vinod Koul May 21, 2019, 5:08 a.m. UTC | #1 
On 16-05-19, 12:44, Alexandru Ardelean wrote:
> From: Michael Hennerich <michael.hennerich@analog.com>
> 
> The TLAST flag is used by the DMAC HDL controller to signal to the
> controller that the following segment (to be submitted) is the last one (in
> a series of segments).
> 
> A receiver DMA (typically another DMAC) can read this parameter (from the
> transfer), and terminate the transfer earlier. A typical use-case for this,
> is when the receiver expects a certain amount of segments, but for some
> reason (e.g. an ADC capture which can have an unknown number of digital
> samples) the number of actual segments is smaller. The receiver would read
> this flag, and then the DMAC would finish.

Applied, thanks
diff mbox series

Patch

diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c
index f32fdf21edbd..8b6fc21bdb9e 100644
--- a/drivers/dma/dma-axi-dmac.c
+++ b/drivers/dma/dma-axi-dmac.c
@@ -71,6 +71,7 @@ 
 #define AXI_DMAC_IRQ_EOT		BIT(1)
 
 #define AXI_DMAC_FLAG_CYCLIC		BIT(0)
+#define AXI_DMAC_FLAG_LAST		BIT(1)
 
 /* The maximum ID allocated by the hardware is 31 */
 #define AXI_DMAC_SG_UNUSED 32U
@@ -216,6 +217,7 @@  static void axi_dmac_start_transfer(struct axi_dmac_chan *chan)
 			desc->num_submitted = 0; /* Start again */
 		else
 			chan->next_desc = NULL;
+		flags |= AXI_DMAC_FLAG_LAST;
 	} else {
 		chan->next_desc = desc;
 	}