Message ID | 20190522090054.6007-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [CI] drm/i915: Engine discovery query | expand |
On 22/05/2019 14:27, Patchwork wrote: > == Series Details == > > Series: drm/i915: Engine discovery query (rev11) > URL : https://patchwork.freedesktop.org/series/39958/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_6120 -> Patchwork_13068 > ==================================================== > > Summary > ------- > > **SUCCESS** > > No regressions found. > > External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/ > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in Patchwork_13068: > > ### IGT changes ### > > #### Suppressed #### > > The following results come from untrusted machines, tests, or statuses. > They do not affect the overall result. > > * igt@gem_ctx_switch@basic-default: > - {fi-cml-u2}: [PASS][1] -> [INCOMPLETE][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-cml-u2/igt@gem_ctx_switch@basic-default.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-cml-u2/igt@gem_ctx_switch@basic-default.html > > > Known issues > ------------ > > Here are the changes found in Patchwork_13068 that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_exec_suspend@basic-s3: > - fi-blb-e6850: [PASS][3] -> [INCOMPLETE][4] ([fdo#107718]) > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html > > * igt@i915_pm_rpm@module-reload: > - fi-skl-6770hq: [PASS][5] -> [FAIL][6] ([fdo#108511]) > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html > > * igt@kms_addfb_basic@bad-pitch-128: > - fi-apl-guc: [PASS][7] -> [INCOMPLETE][8] ([fdo#103927]) > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-apl-guc/igt@kms_addfb_basic@bad-pitch-128.html > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-apl-guc/igt@kms_addfb_basic@bad-pitch-128.html > > > #### Possible fixes #### > > * igt@gem_exec_create@basic: > - {fi-icl-u2}: [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10] > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-icl-u2/igt@gem_exec_create@basic.html > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-icl-u2/igt@gem_exec_create@basic.html > > * igt@i915_module_load@reload-with-fault-injection: > - {fi-icl-u3}: [DMESG-WARN][11] -> [PASS][12] > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-icl-u3/igt@i915_module_load@reload-with-fault-injection.html > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-icl-u3/igt@i915_module_load@reload-with-fault-injection.html > > * igt@i915_selftest@live_hangcheck: > - {fi-icl-dsi}: [INCOMPLETE][13] ([fdo#107713] / [fdo#108569]) -> [PASS][14] > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html > > * igt@vgem_basic@dmabuf-fence: > - {fi-icl-dsi}: [DMESG-WARN][15] ([fdo#106107]) -> [PASS][16] > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6120/fi-icl-dsi/igt@vgem_basic@dmabuf-fence.html > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13068/fi-icl-dsi/igt@vgem_basic@dmabuf-fence.html > > > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > > [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 > [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107 > [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 > [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 > [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 > [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 > [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 > > > Participating hosts (52 -> 44) > ------------------------------ > > Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus fi-snb-2600 > > > Build changes > ------------- > > * Linux: CI_DRM_6120 -> Patchwork_13068 > > CI_DRM_6120: c23269bc95121c14d617ded6b37d219759352078 @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_5003: 54e6d651d1122dfb6578b8179f782d335fe15864 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_13068: f26f9f62928811bf87e591bbf46876bdddd10cf2 @ git://anongit.freedesktop.org/gfx-ci/linux > > > == Linux commits == > > f26f9f629288 drm/i915: Engine discovery query And pushed, completing Media Scalability on the i915 side. Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 4c3753c1b573..2590f5904b67 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -349,6 +349,45 @@ intel_engine_setup(struct drm_i915_private *dev_priv, return 0; } +static void __setup_engine_capabilities(struct intel_engine_cs *engine) +{ + struct drm_i915_private *i915 = engine->i915; + + if (engine->class == VIDEO_DECODE_CLASS) { + /* + * HEVC support is present on first engine instance + * before Gen11 and on all instances afterwards. + */ + if (INTEL_GEN(i915) >= 11 || + (INTEL_GEN(i915) >= 9 && engine->instance == 0)) + engine->uabi_capabilities |= + I915_VIDEO_CLASS_CAPABILITY_HEVC; + + /* + * SFC block is present only on even logical engine + * instances. + */ + if ((INTEL_GEN(i915) >= 11 && + RUNTIME_INFO(i915)->vdbox_sfc_access & engine->mask) || + (INTEL_GEN(i915) >= 9 && engine->instance == 0)) + engine->uabi_capabilities |= + I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC; + } else if (engine->class == VIDEO_ENHANCEMENT_CLASS) { + if (INTEL_GEN(i915) >= 9) + engine->uabi_capabilities |= + I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC; + } +} + +static void intel_setup_engine_capabilities(struct drm_i915_private *i915) +{ + struct intel_engine_cs *engine; + enum intel_engine_id id; + + for_each_engine(engine, i915, id) + __setup_engine_capabilities(engine); +} + /** * intel_engines_cleanup() - free the resources allocated for Command Streamers * @i915: the i915 devic @@ -414,6 +453,8 @@ int intel_engines_init_mmio(struct drm_i915_private *i915) i915_check_and_clear_faults(i915); + intel_setup_engine_capabilities(i915); + return 0; cleanup: diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index f3fc2e8acc90..40e774acc2cd 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -280,6 +280,8 @@ struct intel_engine_cs { u32 context_size; u32 mmio_base; + u32 uabi_capabilities; + struct intel_sseu sseu; struct intel_ring *buffer; diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 782183b78f49..414d0a6d1f70 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -96,9 +96,58 @@ static int query_topology_info(struct drm_i915_private *dev_priv, return total_length; } +static int +query_engine_info(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + struct drm_i915_query_engine_info __user *query_ptr = + u64_to_user_ptr(query_item->data_ptr); + struct drm_i915_engine_info __user *info_ptr; + struct drm_i915_query_engine_info query; + struct drm_i915_engine_info info = { }; + struct intel_engine_cs *engine; + enum intel_engine_id id; + int len, ret; + + if (query_item->flags) + return -EINVAL; + + len = sizeof(struct drm_i915_query_engine_info) + + RUNTIME_INFO(i915)->num_engines * + sizeof(struct drm_i915_engine_info); + + ret = copy_query_item(&query, sizeof(query), len, query_item); + if (ret != 0) + return ret; + + if (query.num_engines || query.rsvd[0] || query.rsvd[1] || + query.rsvd[2]) + return -EINVAL; + + info_ptr = &query_ptr->engines[0]; + + for_each_engine(engine, i915, id) { + info.engine.engine_class = engine->uabi_class; + info.engine.engine_instance = engine->instance; + info.capabilities = engine->uabi_capabilities; + + if (__copy_to_user(info_ptr, &info, sizeof(info))) + return -EFAULT; + + query.num_engines++; + info_ptr++; + } + + if (__copy_to_user(query_ptr, &query, sizeof(query))) + return -EFAULT; + + return len; +} + static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv, struct drm_i915_query_item *query_item) = { query_topology_info, + query_engine_info, }; int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index bdb00ec1f8be..328d05e77d9f 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1982,6 +1982,7 @@ struct drm_i915_perf_oa_config { struct drm_i915_query_item { __u64 query_id; #define DRM_I915_QUERY_TOPOLOGY_INFO 1 +#define DRM_I915_QUERY_ENGINE_INFO 2 /* Must be kept compact -- no holes and well documented */ /* @@ -2080,6 +2081,47 @@ struct drm_i915_query_topology_info { __u8 data[]; }; +/** + * struct drm_i915_engine_info + * + * Describes one engine and it's capabilities as known to the driver. + */ +struct drm_i915_engine_info { + /** Engine class and instance. */ + struct i915_engine_class_instance engine; + + /** Reserved field. */ + __u32 rsvd0; + + /** Engine flags. */ + __u64 flags; + + /** Capabilities of this engine. */ + __u64 capabilities; +#define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0) +#define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1) + + /** Reserved fields. */ + __u64 rsvd1[4]; +}; + +/** + * struct drm_i915_query_engine_info + * + * Engine info query enumerates all engines known to the driver by filling in + * an array of struct drm_i915_engine_info structures. + */ +struct drm_i915_query_engine_info { + /** Number of struct drm_i915_engine_info structs following. */ + __u32 num_engines; + + /** MBZ */ + __u32 rsvd[3]; + + /** Marker for drm_i915_engine_info structures. */ + struct drm_i915_engine_info engines[]; +}; + #if defined(__cplusplus) } #endif