Message ID | 5ce6040d.1c69fb81.60b3b.29fb@mx.google.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | mainline/master boot bisection: v5.2-rc1-165-g54dee406374c on rk3288-veyron-jaq | expand |
On Wed, May 22, 2019 at 07:23:09PM -0700, kernelci.org bot wrote: > Details: https://kernelci.org/boot/id/5ce5984c59b514e6a47a364c > Plain log: https://storage.kernelci.org//mainline/master/v5.2-rc1-165-g54dee406374c/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.txt > HTML log: https://storage.kernelci.org//mainline/master/v5.2-rc1-165-g54dee406374c/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.html > Result: 28694e009e51 thermal: rockchip: fix up the tsadc pinctrl setting error It looks like this issue has persisted for a while without any kind of fix happening - given that the bisection has identified this commit as causing the regression and confirmed that reverting it fixes shouldn't we just revert? My guess would be that there's some error with the pinctrl settings in the DT for the board.
Hi Mark, On 23/5/19 15:12, Mark Brown wrote: > On Wed, May 22, 2019 at 07:23:09PM -0700, kernelci.org bot wrote: > >> Details: https://kernelci.org/boot/id/5ce5984c59b514e6a47a364c >> Plain log: https://storage.kernelci.org//mainline/master/v5.2-rc1-165-g54dee406374c/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.txt >> HTML log: https://storage.kernelci.org//mainline/master/v5.2-rc1-165-g54dee406374c/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.html >> Result: 28694e009e51 thermal: rockchip: fix up the tsadc pinctrl setting error > > It looks like this issue has persisted for a while without any kind of > fix happening - given that the bisection has identified this commit as > causing the regression and confirmed that reverting it fixes shouldn't > we just revert? My guess would be that there's some error with the > pinctrl settings in the DT for the board. > After some discussion Heiko sent a patch that reverts the offending commit one day ago [1] and it's waiting for maintainer to pick-up the patch. The reason why we think is best reverting that fix it is explained here [2] [1] https://lkml.org/lkml/2019/5/22/467 [2] https://lkml.org/lkml/2019/4/30/270 Thanks, Enric
> -----Original Message----- > From: Enric Balletbo i Serra [mailto:enric.balletbo@collabora.com] > Sent: Thursday, May 23, 2019 9:19 PM > To: Mark Brown <broonie@kernel.org>; Eduardo Valentin > <edubezval@gmail.com>; Elaine Zhang <zhangqing@rock-chips.com> > Cc: tomeu.vizoso@collabora.com; guillaume.tucker@collabora.com; > mgalka@collabora.com; matthew.hart@linaro.org; khilman@baylibre.com; > Daniel Lezcano <daniel.lezcano@linaro.org>; Heiko Stuebner > <heiko@sntech.de>; linux-pm@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-rockchip@lists.infradead.org; Zhang, Rui > <rui.zhang@intel.com>; linux-arm-kernel@lists.infradead.org > Subject: Re: mainline/master boot bisection: v5.2-rc1-165-g54dee406374c on > rk3288-veyron-jaq > Importance: High > > Hi Mark, > > On 23/5/19 15:12, Mark Brown wrote: > > On Wed, May 22, 2019 at 07:23:09PM -0700, kernelci.org bot wrote: > > > >> Details: https://kernelci.org/boot/id/5ce5984c59b514e6a47a364c > >> Plain log: https://storage.kernelci.org//mainline/master/v5.2-rc1-165- > g54dee406374c/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE > =y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.txt > >> HTML log: https://storage.kernelci.org//mainline/master/v5.2-rc1-165- > g54dee406374c/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE > =y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.html > >> Result: 28694e009e51 thermal: rockchip: fix up the tsadc pinctrl setting > error > > > > It looks like this issue has persisted for a while without any kind of > > fix happening - given that the bisection has identified this commit as > > causing the regression and confirmed that reverting it fixes shouldn't > > we just revert? My guess would be that there's some error with the > > pinctrl settings in the DT for the board. > > > > After some discussion Heiko sent a patch that reverts the offending commit > one day ago [1] and it's waiting for maintainer to pick-up the patch. > I thought Eduardo will take the patch. But I will apply it and queue it for -rc2 anyway. Thanks, Rui > The reason why we think is best reverting that fix it is explained here [2] > > [1] https://lkml.org/lkml/2019/5/22/467 > [2] https://lkml.org/lkml/2019/4/30/270 > > Thanks, > Enric
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 9c7643d62ed7..6dc7fc516abf 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -172,6 +172,9 @@ struct rockchip_thermal_data { int tshut_temp; enum tshut_mode tshut_mode; enum tshut_polarity tshut_polarity; + struct pinctrl *pinctrl; + struct pinctrl_state *gpio_state; + struct pinctrl_state *otp_state; }; /** @@ -1242,6 +1245,8 @@ static int rockchip_thermal_probe(struct platform_device *pdev) return error; } + thermal->chip->control(thermal->regs, false); + error = clk_prepare_enable(thermal->clk); if (error) { dev_err(&pdev->dev, "failed to enable converter clock: %d\n", @@ -1267,6 +1272,30 @@ static int rockchip_thermal_probe(struct platform_device *pdev) thermal->chip->initialize(thermal->grf, thermal->regs, thermal->tshut_polarity); + if (thermal->tshut_mode == TSHUT_MODE_GPIO) { + thermal->pinctrl = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(thermal->pinctrl)) { + dev_err(&pdev->dev, "failed to find thermal pinctrl\n"); + return PTR_ERR(thermal->pinctrl); + } + + thermal->gpio_state = pinctrl_lookup_state(thermal->pinctrl, + "gpio"); + if (IS_ERR_OR_NULL(thermal->gpio_state)) { + dev_err(&pdev->dev, "failed to find thermal gpio state\n"); + return -EINVAL; + } + + thermal->otp_state = pinctrl_lookup_state(thermal->pinctrl, + "otpout"); + if (IS_ERR_OR_NULL(thermal->otp_state)) { + dev_err(&pdev->dev, "failed to find thermal otpout state\n"); + return -EINVAL; + } + + pinctrl_select_state(thermal->pinctrl, thermal->otp_state); + } + for (i = 0; i < thermal->chip->chn_num; i++) { error = rockchip_thermal_register_sensor(pdev, thermal, &thermal->sensors[i], @@ -1337,8 +1366,8 @@ static int __maybe_unused rockchip_thermal_suspend(struct device *dev) clk_disable(thermal->pclk); clk_disable(thermal->clk); - - pinctrl_pm_select_sleep_state(dev); + if (thermal->tshut_mode == TSHUT_MODE_GPIO) + pinctrl_select_state(thermal->pinctrl, thermal->gpio_state); return 0; } @@ -1383,7 +1412,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev) for (i = 0; i < thermal->chip->chn_num; i++) rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); - pinctrl_pm_select_default_state(dev); + if (thermal->tshut_mode == TSHUT_MODE_GPIO) + pinctrl_select_state(thermal->pinctrl, thermal->otp_state); return 0; }