diff mbox series

[03/10] arm64: dts: meson-gxbb-wetek: enable SARADC

Message ID 20190527132200.17377-4-narmstrong@baylibre.com (mailing list archive)
State Mainlined
Commit dfa8b3cd14dad613c848ecaaa1f39b39ebfeca14
Headers show
Series arm64: meson-gx: misc fixes | expand

Commit Message

Neil Armstrong May 27, 2019, 1:21 p.m. UTC 
From: Christian Hewitt <christianshewitt@gmail.com>

Enable SARADC on Wetek Boards.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Martin Blumenstingl May 27, 2019, 6:15 p.m. UTC | #1 
On Mon, May 27, 2019 at 3:22 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> From: Christian Hewitt <christianshewitt@gmail.com>
>
> Enable SARADC on Wetek Boards.
as far I as remember there's a story behind this (and it would be nice
to have it documented here):
some of the SCPI firmware revisions don't enable the SAR ADC clock
when reading the SoCs temperature.
if the SAR ADC is disabled in Linux then the common clock framework
will disable the SAR ADC clock.
now, when the SCPI firmware uses the SAR ADC to read the SoC
temperature we only get garbage.

enabling the SAR ADC in Linux "fixes" this issue

> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
with that:
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Neil Armstrong May 29, 2019, 2:17 p.m. UTC | #2 
On 27/05/2019 20:15, Martin Blumenstingl wrote:
> On Mon, May 27, 2019 at 3:22 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> From: Christian Hewitt <christianshewitt@gmail.com>
>>
>> Enable SARADC on Wetek Boards.
> as far I as remember there's a story behind this (and it would be nice
> to have it documented here):
> some of the SCPI firmware revisions don't enable the SAR ADC clock
> when reading the SoCs temperature.
> if the SAR ADC is disabled in Linux then the common clock framework
> will disable the SAR ADC clock.
> now, when the SCPI firmware uses the SAR ADC to read the SoC
> temperature we only get garbage.
> 
> enabling the SAR ADC in Linux "fixes" this issue

Yes seems to be this issue solved here

> 
>> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> with that:
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
index b0d74ab619b0..45e306da2154 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
@@ -59,6 +59,13 @@ 
 		regulator-max-microvolt = <3300000>;
 	};
 
+	vddio_ao18: regulator-vddio_ao18 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDIO_AO18";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
 	vcc_3v3: regulator-vcc_3v3 {
 		compatible = "regulator-fixed";
 		regulator-name = "VCC_3V3";
@@ -172,6 +179,11 @@ 
 	clock-names = "clkin0";
 };
 
+&saradc {
+	status = "okay";
+	vref-supply = <&vddio_ao18>;
+};
+
 /* Wireless SDIO Module */
 &sd_emmc_a {
 	status = "okay";