Message ID | 20190604023535.7115-1-josephl@nvidia.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: tegra: add CPU cache topology for Tegra186 | expand |
On Tue, Jun 04, 2019 at 10:35:35AM +0800, Joseph Lo wrote: > Tegra186 has two CPU clusters with its own cache hierarchy. This patch > adds them with the cache information of each of the CPUs. > Please add geometry information if you prefer to expose the same to the user-space. We removed support to read the system registers to fetch these information. In-fact it was for one of the Tegra platforms that geometry in those registers don't match the actual values, at-least that was the argument to drop the support for the same. -- Regards, Sudeep
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 426ac0bdf6a6..26055c7f26e7 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1128,38 +1128,52 @@ cpu@0 { compatible = "nvidia,tegra186-denver"; device_type = "cpu"; + next-level-cache = <&L2_DENVER>; reg = <0x000>; }; cpu@1 { compatible = "nvidia,tegra186-denver"; device_type = "cpu"; + next-level-cache = <&L2_DENVER>; reg = <0x001>; }; cpu@2 { compatible = "arm,cortex-a57"; device_type = "cpu"; + next-level-cache = <&L2_A57>; reg = <0x100>; }; cpu@3 { compatible = "arm,cortex-a57"; device_type = "cpu"; + next-level-cache = <&L2_A57>; reg = <0x101>; }; cpu@4 { compatible = "arm,cortex-a57"; device_type = "cpu"; + next-level-cache = <&L2_A57>; reg = <0x102>; }; cpu@5 { compatible = "arm,cortex-a57"; device_type = "cpu"; + next-level-cache = <&L2_A57>; reg = <0x103>; }; + + L2_DENVER: l2-cache0 { + compatible = "cache"; + }; + + L2_A57: l2-cache1 { + compatible = "cache"; + }; }; bpmp: bpmp {
Tegra186 has two CPU clusters with its own cache hierarchy. This patch adds them with the cache information of each of the CPUs. Signed-off-by: Joseph Lo <josephl@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)