diff mbox series

[11/21] drm/i915: Remove impossible path from i915_gem_init_swizzling

Message ID 20190606093639.9372-12-tvrtko.ursulin@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Implicit dev_priv removal | expand

Commit Message

Tvrtko Ursulin June 6, 2019, 9:36 a.m. UTC
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Gen8+ does not have swizziling so function will exit on the top most check.

At the same time convert the BUG to MISSING_CASE for a little more debug
info.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

Comments

Chris Wilson June 6, 2019, 10:01 a.m. UTC | #1
Quoting Tvrtko Ursulin (2019-06-06 10:36:29)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Gen8+ does not have swizziling so function will exit on the top most check.
> 
> At the same time convert the BUG to MISSING_CASE for a little more debug
> info.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 8eee9ecf0adf..7512c804d4b7 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1216,10 +1216,8 @@ void i915_gem_init_swizzling(struct drm_i915_private *dev_priv)
>                 I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));
>         else if (IS_GEN(dev_priv, 7))
>                 I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));
> -       else if (IS_GEN(dev_priv, 8))
> -               I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));

But that is the register we would need to set if we choose to reenable
swizzling for whatever mysterious reason.
-Chris
Tvrtko Ursulin June 6, 2019, 10:23 a.m. UTC | #2
On 06/06/2019 11:01, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-06-06 10:36:29)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Gen8+ does not have swizziling so function will exit on the top most check.
>>
>> At the same time convert the BUG to MISSING_CASE for a little more debug
>> info.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_gem.c | 4 +---
>>   1 file changed, 1 insertion(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>> index 8eee9ecf0adf..7512c804d4b7 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -1216,10 +1216,8 @@ void i915_gem_init_swizzling(struct drm_i915_private *dev_priv)
>>                  I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));
>>          else if (IS_GEN(dev_priv, 7))
>>                  I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));
>> -       else if (IS_GEN(dev_priv, 8))
>> -               I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));
> 
> But that is the register we would need to set if we choose to reenable
> swizzling for whatever mysterious reason.

On Gen8 after all this time? I can drop the patch if you think that's a 
possibility.

Regards,

Tvrtko
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8eee9ecf0adf..7512c804d4b7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1216,10 +1216,8 @@  void i915_gem_init_swizzling(struct drm_i915_private *dev_priv)
 		I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));
 	else if (IS_GEN(dev_priv, 7))
 		I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));
-	else if (IS_GEN(dev_priv, 8))
-		I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));
 	else
-		BUG();
+		MISSING_CASE(INTEL_GEN(dev_priv));
 }
 
 static void init_unused_ring(struct drm_i915_private *dev_priv, u32 base)