| Message ID | 20190606080255.25504-1-horia.geanta@nxp.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | ARM: dts: imx7ulp: add crypto support | expand |
On Thu, Jun 06, 2019 at 11:02:55AM +0300, Horia Geantă wrote: > From: Iuliana Prodan <iuliana.prodan@nxp.com> > > Add crypto node in device tree for CAAM support. > > Noteworthy is that on 7ulp the interrupt line is shared > between the two job rings. > > Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> > Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> > Signed-off-by: Horia Geantă <horia.geanta@nxp.com> > --- > > I've just realized that this patch should be merged through the crypto tree, > else bisectability could be affected due to cryptodev-2.6 > commit 385cfc84a5a8 ("crypto: caam - disable some clock checks for iMX7ULP") > ( https://patchwork.kernel.org/patch/10970017/ ) > which should come first. I'm not sure I follow it. This is a new device added to imx7ulp DT. It's never worked before on imx7ulp. How would it affect git bisect? Shawn > > arch/arm/boot/dts/imx7ulp.dtsi | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi > index d6b711011cba..e20483714be5 100644 > --- a/arch/arm/boot/dts/imx7ulp.dtsi > +++ b/arch/arm/boot/dts/imx7ulp.dtsi > @@ -100,6 +100,29 @@ > reg = <0x40000000 0x800000>; > ranges; > > + crypto: crypto@40240000 { > + compatible = "fsl,sec-v4.0"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x40240000 0x10000>; > + ranges = <0 0x40240000 0x10000>; > + clocks = <&pcc2 IMX7ULP_CLK_CAAM>, > + <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; > + clock-names = "aclk", "ipg"; > + > + sec_jr0: jr0@1000 { > + compatible = "fsl,sec-v4.0-job-ring"; > + reg = <0x1000 0x1000>; > + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + sec_jr1: jr1@2000 { > + compatible = "fsl,sec-v4.0-job-ring"; > + reg = <0x2000 0x1000>; > + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; > + }; > + }; > + > lpuart4: serial@402d0000 { > compatible = "fsl,imx7ulp-lpuart"; > reg = <0x402d0000 0x1000>; > -- > 2.17.1 >
On 6/12/2019 1:40 PM, Shawn Guo wrote: > On Thu, Jun 06, 2019 at 11:02:55AM +0300, Horia Geantă wrote: >> From: Iuliana Prodan <iuliana.prodan@nxp.com> >> >> Add crypto node in device tree for CAAM support. >> >> Noteworthy is that on 7ulp the interrupt line is shared >> between the two job rings. >> >> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> >> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> >> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> >> --- >> >> I've just realized that this patch should be merged through the crypto tree, >> else bisectability could be affected due to cryptodev-2.6 >> commit 385cfc84a5a8 ("crypto: caam - disable some clock checks for iMX7ULP") >> ( https://patchwork.kernel.org/patch/10970017/ ) >> which should come first. > > I'm not sure I follow it. This is a new device added to imx7ulp DT. > It's never worked before on imx7ulp. How would it affect git bisect? > Driver corresponding to this device (drivers/crypto/caam) has to be updated before adding the node in DT. Is there any guarantee wrt. merge order of the crypto and DT trees? Thanks, Horia
On Wed, Jun 12, 2019 at 11:45:18AM +0000, Horia Geanta wrote: > On 6/12/2019 1:40 PM, Shawn Guo wrote: > > On Thu, Jun 06, 2019 at 11:02:55AM +0300, Horia Geantă wrote: > >> From: Iuliana Prodan <iuliana.prodan@nxp.com> > >> > >> Add crypto node in device tree for CAAM support. > >> > >> Noteworthy is that on 7ulp the interrupt line is shared > >> between the two job rings. > >> > >> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> > >> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> > >> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> > >> --- > >> > >> I've just realized that this patch should be merged through the crypto tree, > >> else bisectability could be affected due to cryptodev-2.6 > >> commit 385cfc84a5a8 ("crypto: caam - disable some clock checks for iMX7ULP") > >> ( https://patchwork.kernel.org/patch/10970017/ ) > >> which should come first. > > > > I'm not sure I follow it. This is a new device added to imx7ulp DT. > > It's never worked before on imx7ulp. How would it affect git bisect? > > > Driver corresponding to this device (drivers/crypto/caam) has to be updated > before adding the node in DT. > Is there any guarantee wrt. merge order of the crypto and DT trees? Do not merge DT changes until driver part hits mainline. Shawn
On 6/12/2019 4:06 PM, Shawn Guo wrote: > On Wed, Jun 12, 2019 at 11:45:18AM +0000, Horia Geanta wrote: >> On 6/12/2019 1:40 PM, Shawn Guo wrote: >>> On Thu, Jun 06, 2019 at 11:02:55AM +0300, Horia Geantă wrote: >>>> From: Iuliana Prodan <iuliana.prodan@nxp.com> >>>> >>>> Add crypto node in device tree for CAAM support. >>>> >>>> Noteworthy is that on 7ulp the interrupt line is shared >>>> between the two job rings. >>>> >>>> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> >>>> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> >>>> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> >>>> --- >>>> >>>> I've just realized that this patch should be merged through the crypto tree, >>>> else bisectability could be affected due to cryptodev-2.6 >>>> commit 385cfc84a5a8 ("crypto: caam - disable some clock checks for iMX7ULP") >>>> ( https://patchwork.kernel.org/patch/10970017/ ) >>>> which should come first. >>> >>> I'm not sure I follow it. This is a new device added to imx7ulp DT. >>> It's never worked before on imx7ulp. How would it affect git bisect? >>> >> Driver corresponding to this device (drivers/crypto/caam) has to be updated >> before adding the node in DT. >> Is there any guarantee wrt. merge order of the crypto and DT trees? > > Do not merge DT changes until driver part hits mainline. > That would mean driver changes would be merged in v5.3 and DT node in v5.4. Would going through the crypto tree with this patch be such a big issue? I don't think it's the first time (relatively small) DT patches are merged via other trees. Thanks, Horia
On Wed, Jun 12, 2019 at 01:15:46PM +0000, Horia Geanta wrote: > On 6/12/2019 4:06 PM, Shawn Guo wrote: > > On Wed, Jun 12, 2019 at 11:45:18AM +0000, Horia Geanta wrote: > >> On 6/12/2019 1:40 PM, Shawn Guo wrote: > >>> On Thu, Jun 06, 2019 at 11:02:55AM +0300, Horia Geantă wrote: > >>>> From: Iuliana Prodan <iuliana.prodan@nxp.com> > >>>> > >>>> Add crypto node in device tree for CAAM support. > >>>> > >>>> Noteworthy is that on 7ulp the interrupt line is shared > >>>> between the two job rings. > >>>> > >>>> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> > >>>> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> > >>>> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> > >>>> --- > >>>> > >>>> I've just realized that this patch should be merged through the crypto tree, > >>>> else bisectability could be affected due to cryptodev-2.6 > >>>> commit 385cfc84a5a8 ("crypto: caam - disable some clock checks for iMX7ULP") > >>>> ( https://patchwork.kernel.org/patch/10970017/ ) > >>>> which should come first. > >>> > >>> I'm not sure I follow it. This is a new device added to imx7ulp DT. > >>> It's never worked before on imx7ulp. How would it affect git bisect? > >>> > >> Driver corresponding to this device (drivers/crypto/caam) has to be updated > >> before adding the node in DT. > >> Is there any guarantee wrt. merge order of the crypto and DT trees? > > > > Do not merge DT changes until driver part hits mainline. > > > That would mean driver changes would be merged in v5.3 and DT node in v5.4. It's quite normal that dependent changes land on mainline in multiple cycles. > > Would going through the crypto tree with this patch be such a big issue? The only issue would be the potential merge conflict. > I don't think it's the first time (relatively small) DT patches > are merged via other trees. Yes, it happens from time to time depending on maintainer's style. I'm fine with the DT changes going through other subsystem tree, if the subsystem maintainer wants to and is willing to take the risk of merge conflict between his tree and arm-soc tree. Shawn
On Wed, Jun 12, 2019 at 09:26:02PM +0800, Shawn Guo wrote: > > Yes, it happens from time to time depending on maintainer's style. I'm > fine with the DT changes going through other subsystem tree, if the > subsystem maintainer wants to and is willing to take the risk of merge > conflict between his tree and arm-soc tree. I have no problems with potential merge conflicts. Cheers,
On Wed, Jun 12, 2019 at 09:59:52PM +0800, Herbert Xu wrote: > On Wed, Jun 12, 2019 at 09:26:02PM +0800, Shawn Guo wrote: > > > > Yes, it happens from time to time depending on maintainer's style. I'm > > fine with the DT changes going through other subsystem tree, if the > > subsystem maintainer wants to and is willing to take the risk of merge > > conflict between his tree and arm-soc tree. > > I have no problems with potential merge conflicts. Then feel free to take it: Acked-by: Shawn Guo <shawnguo@kernel.org>
On Thu, Jun 13, 2019 at 08:47:10AM +0800, Shawn Guo wrote: > On Wed, Jun 12, 2019 at 09:59:52PM +0800, Herbert Xu wrote: > > On Wed, Jun 12, 2019 at 09:26:02PM +0800, Shawn Guo wrote: > > > > > > Yes, it happens from time to time depending on maintainer's style. I'm > > > fine with the DT changes going through other subsystem tree, if the > > > subsystem maintainer wants to and is willing to take the risk of merge > > > conflict between his tree and arm-soc tree. > > > > I have no problems with potential merge conflicts. > > Then feel free to take it: > > Acked-by: Shawn Guo <shawnguo@kernel.org> Patch applied. Thanks.
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index d6b711011cba..e20483714be5 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -100,6 +100,29 @@ reg = <0x40000000 0x800000>; ranges; + crypto: crypto@40240000 { + compatible = "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x40240000 0x10000>; + ranges = <0 0x40240000 0x10000>; + clocks = <&pcc2 IMX7ULP_CLK_CAAM>, + <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; + clock-names = "aclk", "ipg"; + + sec_jr0: jr0@1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr1: jr1@2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + lpuart4: serial@402d0000 { compatible = "fsl,imx7ulp-lpuart"; reg = <0x402d0000 0x1000>;