| Message ID | 1559734986-7379-19-git-send-email-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add drm support for MT8183 | expand |
Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > This patch add layer_nr for ovl private data > ovl_2l almost same with with ovl hardware, except the > layer number for ovl_2l is 2 and ovl is 4. > this patch is a preparation for ovl-2l and > ovl share the same driver. This patch is identical to v2, and I've give a 'Reviewed-by' for v2, so you should keep this 'Reviewed-by' tag in this patch, so I still give you a Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > index afb313c..a0ab760 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > @@ -60,6 +60,7 @@ > struct mtk_disp_ovl_data { > unsigned int addr; > unsigned int gmc_bits; > + unsigned int layer_nr; > bool fmt_rgb565_is_0; > }; > > @@ -137,7 +138,9 @@ static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w, > > static unsigned int mtk_ovl_layer_nr(struct mtk_ddp_comp *comp) > { > - return 4; > + struct mtk_disp_ovl *ovl = comp_to_ovl(comp); > + > + return ovl->data->layer_nr; > } > > static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx) > @@ -342,12 +345,14 @@ static int mtk_disp_ovl_remove(struct platform_device *pdev) > static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = { > .addr = DISP_REG_OVL_ADDR_MT2701, > .gmc_bits = 8, > + .layer_nr = 4, > .fmt_rgb565_is_0 = false, > }; > > static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { > .addr = DISP_REG_OVL_ADDR_MT8173, > .gmc_bits = 8, > + .layer_nr = 4, > .fmt_rgb565_is_0 = true, > }; >
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index afb313c..a0ab760 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -60,6 +60,7 @@ struct mtk_disp_ovl_data { unsigned int addr; unsigned int gmc_bits; + unsigned int layer_nr; bool fmt_rgb565_is_0; }; @@ -137,7 +138,9 @@ static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w, static unsigned int mtk_ovl_layer_nr(struct mtk_ddp_comp *comp) { - return 4; + struct mtk_disp_ovl *ovl = comp_to_ovl(comp); + + return ovl->data->layer_nr; } static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx) @@ -342,12 +345,14 @@ static int mtk_disp_ovl_remove(struct platform_device *pdev) static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = { .addr = DISP_REG_OVL_ADDR_MT2701, .gmc_bits = 8, + .layer_nr = 4, .fmt_rgb565_is_0 = false, }; static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { .addr = DISP_REG_OVL_ADDR_MT8173, .gmc_bits = 8, + .layer_nr = 4, .fmt_rgb565_is_0 = true, };