| Message ID | 20190618155834.15545-1-sebastien.szymanski@armadeus.com (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Commit | 3cf10132ac8d536565f2c02f60a3aeb315863a52 |
| Headers | show |
| Series | [1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts | expand |
Hi Sébastien, On Tue, Jun 18, 2019 at 12:58 PM Sébastien Szymanski <sebastien.szymanski@armadeus.com> wrote: > > According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt > summary", the interrupts for the PWM[1-4] go from 83 to 86. > > Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes") > Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Good catch: Reviewed-by: Fabio Estevam <festevam@gmail.com>
+Lothar On Tue, Jun 18, 2019 at 05:58:34PM +0200, Sébastien Szymanski wrote: > According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt > summary", the interrupts for the PWM[1-4] go from 83 to 86. > > Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes") > Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Just curious - did you spot the error by testing PWM or merely by looking at the code and document? Shawn > --- > arch/arm/boot/dts/imx6ul.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi > index bbf010c73336..a7f6d1d58e20 100644 > --- a/arch/arm/boot/dts/imx6ul.dtsi > +++ b/arch/arm/boot/dts/imx6ul.dtsi > @@ -358,7 +358,7 @@ > pwm1: pwm@2080000 { > compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; > reg = <0x02080000 0x4000>; > - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clks IMX6UL_CLK_PWM1>, > <&clks IMX6UL_CLK_PWM1>; > clock-names = "ipg", "per"; > @@ -369,7 +369,7 @@ > pwm2: pwm@2084000 { > compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; > reg = <0x02084000 0x4000>; > - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clks IMX6UL_CLK_PWM2>, > <&clks IMX6UL_CLK_PWM2>; > clock-names = "ipg", "per"; > @@ -380,7 +380,7 @@ > pwm3: pwm@2088000 { > compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; > reg = <0x02088000 0x4000>; > - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clks IMX6UL_CLK_PWM3>, > <&clks IMX6UL_CLK_PWM3>; > clock-names = "ipg", "per"; > @@ -391,7 +391,7 @@ > pwm4: pwm@208c000 { > compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; > reg = <0x0208c000 0x4000>; > - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clks IMX6UL_CLK_PWM4>, > <&clks IMX6UL_CLK_PWM4>; > clock-names = "ipg", "per"; > -- > 2.21.0 >
Hello, On 6/24/19 2:47 AM, Shawn Guo wrote: > +Lothar > > On Tue, Jun 18, 2019 at 05:58:34PM +0200, Sébastien Szymanski wrote: >> According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt >> summary", the interrupts for the PWM[1-4] go from 83 to 86. >> >> Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes") >> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> > > Just curious - did you spot the error by testing PWM or merely by > looking at the code and document? I spotted the error when trying to play sound with PWM [1]. The PWM driver (drivers/pwm/pwm-imx27.c) don't use interrupt that's probably why nobody notice this error. [1] https://github.com/sasamy/imx-snd-pwm Regards, > > Shawn > >> --- >> arch/arm/boot/dts/imx6ul.dtsi | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi >> index bbf010c73336..a7f6d1d58e20 100644 >> --- a/arch/arm/boot/dts/imx6ul.dtsi >> +++ b/arch/arm/boot/dts/imx6ul.dtsi >> @@ -358,7 +358,7 @@ >> pwm1: pwm@2080000 { >> compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; >> reg = <0x02080000 0x4000>; >> - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; >> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; >> clocks = <&clks IMX6UL_CLK_PWM1>, >> <&clks IMX6UL_CLK_PWM1>; >> clock-names = "ipg", "per"; >> @@ -369,7 +369,7 @@ >> pwm2: pwm@2084000 { >> compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; >> reg = <0x02084000 0x4000>; >> - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; >> + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; >> clocks = <&clks IMX6UL_CLK_PWM2>, >> <&clks IMX6UL_CLK_PWM2>; >> clock-names = "ipg", "per"; >> @@ -380,7 +380,7 @@ >> pwm3: pwm@2088000 { >> compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; >> reg = <0x02088000 0x4000>; >> - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; >> + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; >> clocks = <&clks IMX6UL_CLK_PWM3>, >> <&clks IMX6UL_CLK_PWM3>; >> clock-names = "ipg", "per"; >> @@ -391,7 +391,7 @@ >> pwm4: pwm@208c000 { >> compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; >> reg = <0x0208c000 0x4000>; >> - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; >> + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; >> clocks = <&clks IMX6UL_CLK_PWM4>, >> <&clks IMX6UL_CLK_PWM4>; >> clock-names = "ipg", "per"; >> -- >> 2.21.0 >>
On Mon, Jun 24, 2019 at 09:36:37AM +0200, Sébastien Szymanski wrote: > Hello, > > On 6/24/19 2:47 AM, Shawn Guo wrote: > > +Lothar > > > > On Tue, Jun 18, 2019 at 05:58:34PM +0200, Sébastien Szymanski wrote: > >> According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt > >> summary", the interrupts for the PWM[1-4] go from 83 to 86. > >> > >> Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes") > >> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> > > > > Just curious - did you spot the error by testing PWM or merely by > > looking at the code and document? > > I spotted the error when trying to play sound with PWM [1]. > The PWM driver (drivers/pwm/pwm-imx27.c) don't use interrupt that's > probably why nobody notice this error. Thanks for the info. Patch applied, thanks. Shawn > > [1] https://github.com/sasamy/imx-snd-pwm
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index bbf010c73336..a7f6d1d58e20 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -358,7 +358,7 @@ pwm1: pwm@2080000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x02080000 0x4000>; - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM1>, <&clks IMX6UL_CLK_PWM1>; clock-names = "ipg", "per"; @@ -369,7 +369,7 @@ pwm2: pwm@2084000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x02084000 0x4000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM2>, <&clks IMX6UL_CLK_PWM2>; clock-names = "ipg", "per"; @@ -380,7 +380,7 @@ pwm3: pwm@2088000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x02088000 0x4000>; - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM3>, <&clks IMX6UL_CLK_PWM3>; clock-names = "ipg", "per"; @@ -391,7 +391,7 @@ pwm4: pwm@208c000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x0208c000 0x4000>; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM4>, <&clks IMX6UL_CLK_PWM4>; clock-names = "ipg", "per";
According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt summary", the interrupts for the PWM[1-4] go from 83 to 86. Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes") Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> --- arch/arm/boot/dts/imx6ul.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)