| Message ID | 20190627205633.1143-7-matthew.auld@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce memory region concept (including device local memory) | expand |
Quoting Matthew Auld (2019-06-27 21:56:02) > From: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > > Exposes available regions for the platform. Shared memory will > always be available. > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/i915_pci.c | 29 ++++++++++++++----- > drivers/gpu/drm/i915/intel_device_info.h | 1 + > .../gpu/drm/i915/selftests/mock_gem_device.c | 2 ++ > 4 files changed, 26 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 97d02b32a208..838a796d9c55 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2288,6 +2288,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > > #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc) > > +#define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i)) > + > /* > * For now, anything with a GuC requires uCode loading, and then supports > * command submission once loaded. But these are logically independent > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 94b588e0a1dd..c513532b8da7 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -144,6 +144,9 @@ > #define GEN_DEFAULT_PAGE_SIZES \ > .page_sizes = I915_GTT_PAGE_SIZE_4K > > +#define GEN_DEFAULT_REGIONS \ > + .memory_regions = REGION_SMEM | REGION_STOLEN > + > #define I830_FEATURES \ > GEN(2), \ > .is_mobile = 1, \ > @@ -161,7 +164,8 @@ > I9XX_PIPE_OFFSETS, \ > I9XX_CURSOR_OFFSETS, \ > I9XX_COLORS, \ > - GEN_DEFAULT_PAGE_SIZES > + GEN_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > #define I845_FEATURES \ > GEN(2), \ > @@ -178,7 +182,8 @@ > I845_PIPE_OFFSETS, \ > I845_CURSOR_OFFSETS, \ > I9XX_COLORS, \ > - GEN_DEFAULT_PAGE_SIZES > + GEN_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > static const struct intel_device_info intel_i830_info = { > I830_FEATURES, > @@ -212,7 +217,8 @@ static const struct intel_device_info intel_i865g_info = { > I9XX_PIPE_OFFSETS, \ > I9XX_CURSOR_OFFSETS, \ > I9XX_COLORS, \ > - GEN_DEFAULT_PAGE_SIZES > + GEN_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > static const struct intel_device_info intel_i915g_info = { > GEN3_FEATURES, > @@ -297,7 +303,8 @@ static const struct intel_device_info intel_pineview_m_info = { > I9XX_PIPE_OFFSETS, \ > I9XX_CURSOR_OFFSETS, \ > I965_COLORS, \ > - GEN_DEFAULT_PAGE_SIZES > + GEN_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > static const struct intel_device_info intel_i965g_info = { > GEN4_FEATURES, > @@ -347,7 +354,8 @@ static const struct intel_device_info intel_gm45_info = { > I9XX_PIPE_OFFSETS, \ > I9XX_CURSOR_OFFSETS, \ > ILK_COLORS, \ > - GEN_DEFAULT_PAGE_SIZES > + GEN_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > static const struct intel_device_info intel_ironlake_d_info = { > GEN5_FEATURES, > @@ -377,7 +385,8 @@ static const struct intel_device_info intel_ironlake_m_info = { > I9XX_PIPE_OFFSETS, \ > I9XX_CURSOR_OFFSETS, \ > ILK_COLORS, \ > - GEN_DEFAULT_PAGE_SIZES > + GEN_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > #define SNB_D_PLATFORM \ > GEN6_FEATURES, \ > @@ -425,7 +434,8 @@ static const struct intel_device_info intel_sandybridge_m_gt2_info = { > IVB_PIPE_OFFSETS, \ > IVB_CURSOR_OFFSETS, \ > IVB_COLORS, \ > - GEN_DEFAULT_PAGE_SIZES > + GEN_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > #define IVB_D_PLATFORM \ > GEN7_FEATURES, \ > @@ -486,6 +496,7 @@ static const struct intel_device_info intel_valleyview_info = { > I9XX_CURSOR_OFFSETS, > I965_COLORS, > GEN_DEFAULT_PAGE_SIZES, > + GEN_DEFAULT_REGIONS, > }; > > #define G75_FEATURES \ > @@ -582,6 +593,7 @@ static const struct intel_device_info intel_cherryview_info = { > CHV_CURSOR_OFFSETS, > CHV_COLORS, > GEN_DEFAULT_PAGE_SIZES, > + GEN_DEFAULT_REGIONS, > }; > > #define GEN9_DEFAULT_PAGE_SIZES \ > @@ -657,7 +669,8 @@ static const struct intel_device_info intel_skylake_gt4_info = { > HSW_PIPE_OFFSETS, \ > IVB_CURSOR_OFFSETS, \ > IVB_COLORS, \ > - GEN9_DEFAULT_PAGE_SIZES > + GEN9_DEFAULT_PAGE_SIZES, \ > + GEN_DEFAULT_REGIONS > > static const struct intel_device_info intel_broxton_info = { > GEN9_LP_FEATURES, > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h > index ddafc819bf30..63369b65110e 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.h > +++ b/drivers/gpu/drm/i915/intel_device_info.h > @@ -170,6 +170,7 @@ struct intel_device_info { > } display; > > u16 ddb_size; /* in blocks */ > + u32 memory_regions; Why here? You are in between various display entities, just a few lines above you have the ppgtt and older page sizes. -Chris
Quoting Matthew Auld (2019-06-27 21:56:02) > From: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > > Exposes available regions for the platform. Shared memory will > always be available. > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/i915_pci.c | 29 ++++++++++++++----- > drivers/gpu/drm/i915/intel_device_info.h | 1 + > .../gpu/drm/i915/selftests/mock_gem_device.c | 2 ++ > 4 files changed, 26 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 97d02b32a208..838a796d9c55 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2288,6 +2288,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > > #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc) > > +#define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i)) > + > /* > * For now, anything with a GuC requires uCode loading, and then supports > * command submission once loaded. But these are logically independent > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 94b588e0a1dd..c513532b8da7 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -144,6 +144,9 @@ > #define GEN_DEFAULT_PAGE_SIZES \ > .page_sizes = I915_GTT_PAGE_SIZE_4K > > +#define GEN_DEFAULT_REGIONS \ > + .memory_regions = REGION_SMEM | REGION_STOLEN But you didn't add a stolen memory_region and use the new interface for allocating the current stolen objects? -Chris
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 97d02b32a208..838a796d9c55 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2288,6 +2288,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc) +#define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i)) + /* * For now, anything with a GuC requires uCode loading, and then supports * command submission once loaded. But these are logically independent diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 94b588e0a1dd..c513532b8da7 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -144,6 +144,9 @@ #define GEN_DEFAULT_PAGE_SIZES \ .page_sizes = I915_GTT_PAGE_SIZE_4K +#define GEN_DEFAULT_REGIONS \ + .memory_regions = REGION_SMEM | REGION_STOLEN + #define I830_FEATURES \ GEN(2), \ .is_mobile = 1, \ @@ -161,7 +164,8 @@ I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ I9XX_COLORS, \ - GEN_DEFAULT_PAGE_SIZES + GEN_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS #define I845_FEATURES \ GEN(2), \ @@ -178,7 +182,8 @@ I845_PIPE_OFFSETS, \ I845_CURSOR_OFFSETS, \ I9XX_COLORS, \ - GEN_DEFAULT_PAGE_SIZES + GEN_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS static const struct intel_device_info intel_i830_info = { I830_FEATURES, @@ -212,7 +217,8 @@ static const struct intel_device_info intel_i865g_info = { I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ I9XX_COLORS, \ - GEN_DEFAULT_PAGE_SIZES + GEN_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS static const struct intel_device_info intel_i915g_info = { GEN3_FEATURES, @@ -297,7 +303,8 @@ static const struct intel_device_info intel_pineview_m_info = { I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ I965_COLORS, \ - GEN_DEFAULT_PAGE_SIZES + GEN_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS static const struct intel_device_info intel_i965g_info = { GEN4_FEATURES, @@ -347,7 +354,8 @@ static const struct intel_device_info intel_gm45_info = { I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ ILK_COLORS, \ - GEN_DEFAULT_PAGE_SIZES + GEN_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS static const struct intel_device_info intel_ironlake_d_info = { GEN5_FEATURES, @@ -377,7 +385,8 @@ static const struct intel_device_info intel_ironlake_m_info = { I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ ILK_COLORS, \ - GEN_DEFAULT_PAGE_SIZES + GEN_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS #define SNB_D_PLATFORM \ GEN6_FEATURES, \ @@ -425,7 +434,8 @@ static const struct intel_device_info intel_sandybridge_m_gt2_info = { IVB_PIPE_OFFSETS, \ IVB_CURSOR_OFFSETS, \ IVB_COLORS, \ - GEN_DEFAULT_PAGE_SIZES + GEN_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS #define IVB_D_PLATFORM \ GEN7_FEATURES, \ @@ -486,6 +496,7 @@ static const struct intel_device_info intel_valleyview_info = { I9XX_CURSOR_OFFSETS, I965_COLORS, GEN_DEFAULT_PAGE_SIZES, + GEN_DEFAULT_REGIONS, }; #define G75_FEATURES \ @@ -582,6 +593,7 @@ static const struct intel_device_info intel_cherryview_info = { CHV_CURSOR_OFFSETS, CHV_COLORS, GEN_DEFAULT_PAGE_SIZES, + GEN_DEFAULT_REGIONS, }; #define GEN9_DEFAULT_PAGE_SIZES \ @@ -657,7 +669,8 @@ static const struct intel_device_info intel_skylake_gt4_info = { HSW_PIPE_OFFSETS, \ IVB_CURSOR_OFFSETS, \ IVB_COLORS, \ - GEN9_DEFAULT_PAGE_SIZES + GEN9_DEFAULT_PAGE_SIZES, \ + GEN_DEFAULT_REGIONS static const struct intel_device_info intel_broxton_info = { GEN9_LP_FEATURES, diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index ddafc819bf30..63369b65110e 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -170,6 +170,7 @@ struct intel_device_info { } display; u16 ddb_size; /* in blocks */ + u32 memory_regions; /* Register offsets for the various display pipes and transcoders */ int pipe_offsets[I915_MAX_TRANSCODERS]; diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c index 86f86c3d38a8..f8b48304fcec 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c @@ -179,6 +179,8 @@ struct drm_i915_private *mock_gem_device(void) I915_GTT_PAGE_SIZE_64K | I915_GTT_PAGE_SIZE_2M; + mkwrite_device_info(i915)->memory_regions = REGION_SMEM; + mock_uncore_init(&i915->uncore); i915_gem_init__mm(i915); intel_gt_init_early(&i915->gt, i915);