| Message ID | 20190702154419.20812-4-robdclark@gmail.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | drm/bridge: ti-sn65dsi86: debugfs and mode_flags fix | expand |
On Tue, Jul 2, 2019 at 9:46 AM Rob Clark <robdclark@gmail.com> wrote: > > From: Rob Clark <robdclark@chromium.org> > > Noticed while comparing register dump of how bootloader configures DSI > vs how kernel configures. It seems the bridge still works either way, > but fixing this clears the 'CHA_DATATYPE_ERR' error status bit. > > Signed-off-by: Rob Clark <robdclark@chromium.org> > --- > drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > index a6f27648c015..c8fb45e7b06d 100644 > --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > @@ -342,8 +342,7 @@ static int ti_sn_bridge_attach(struct drm_bridge *bridge) > /* TODO: setting to 4 lanes always for now */ > dsi->lanes = 4; > dsi->format = MIPI_DSI_FMT_RGB888; > - dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > - MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; > + dsi->mode_flags = MIPI_DSI_MODE_VIDEO; Did you check this against the datasheet? Per my reading, EOT_PACKET and VIDEO_HSE appear valid. I don't know about VIDEO_SYNC_PULSE.
On Tue, Jul 2, 2019 at 10:09 AM Jeffrey Hugo <jeffrey.l.hugo@gmail.com> wrote: > > On Tue, Jul 2, 2019 at 9:46 AM Rob Clark <robdclark@gmail.com> wrote: > > > > From: Rob Clark <robdclark@chromium.org> > > > > Noticed while comparing register dump of how bootloader configures DSI > > vs how kernel configures. It seems the bridge still works either way, > > but fixing this clears the 'CHA_DATATYPE_ERR' error status bit. > > > > Signed-off-by: Rob Clark <robdclark@chromium.org> > > --- > > drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > > index a6f27648c015..c8fb45e7b06d 100644 > > --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c > > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > > @@ -342,8 +342,7 @@ static int ti_sn_bridge_attach(struct drm_bridge *bridge) > > /* TODO: setting to 4 lanes always for now */ > > dsi->lanes = 4; > > dsi->format = MIPI_DSI_FMT_RGB888; > > - dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > - MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; > > + dsi->mode_flags = MIPI_DSI_MODE_VIDEO; > > Did you check this against the datasheet? Per my reading, EOT_PACKET > and VIDEO_HSE appear valid. I don't know about VIDEO_SYNC_PULSE. The EOT flat is badly named: /* disable EoT packets in HS mode */ #define MIPI_DSI_MODE_EOT_PACKET BIT(9) I can double check out HSE, but this was one of the setting differences between bootloader and kernel BR, -R
On Tue, Jul 2, 2019 at 11:12 AM Rob Clark <robdclark@gmail.com> wrote: > > On Tue, Jul 2, 2019 at 10:09 AM Jeffrey Hugo <jeffrey.l.hugo@gmail.com> wrote: > > > > On Tue, Jul 2, 2019 at 9:46 AM Rob Clark <robdclark@gmail.com> wrote: > > > > > > - dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > > - MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; > > > + dsi->mode_flags = MIPI_DSI_MODE_VIDEO; > > > > Did you check this against the datasheet? Per my reading, EOT_PACKET > > and VIDEO_HSE appear valid. I don't know about VIDEO_SYNC_PULSE. > > The EOT flat is badly named: > > /* disable EoT packets in HS mode */ > #define MIPI_DSI_MODE_EOT_PACKET BIT(9) > > I can double check out HSE, but this was one of the setting > differences between bootloader and kernel Ah yeah, you are right. My eyes apparently skipped over the "disable". If the bootloader is not setting the HSE, then I can't think of a reason why we would be having an issue also not setting it. Seems good to me Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
On 02.07.2019 19:23, Jeffrey Hugo wrote: > On Tue, Jul 2, 2019 at 11:12 AM Rob Clark <robdclark@gmail.com> wrote: >> On Tue, Jul 2, 2019 at 10:09 AM Jeffrey Hugo <jeffrey.l.hugo@gmail.com> wrote: >>> On Tue, Jul 2, 2019 at 9:46 AM Rob Clark <robdclark@gmail.com> wrote: >>>> - dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | >>>> - MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; >>>> + dsi->mode_flags = MIPI_DSI_MODE_VIDEO; >>> Did you check this against the datasheet? Per my reading, EOT_PACKET >>> and VIDEO_HSE appear valid. I don't know about VIDEO_SYNC_PULSE. >> The EOT flat is badly named: >> >> /* disable EoT packets in HS mode */ >> #define MIPI_DSI_MODE_EOT_PACKET BIT(9) >> >> I can double check out HSE, but this was one of the setting >> differences between bootloader and kernel > Ah yeah, you are right. My eyes apparently skipped over the "disable". > > If the bootloader is not setting the HSE, then I can't think of a > reason why we would be having an issue also not setting it. > > Seems good to me > > Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> > > Yes, the flags require cleanup. Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> -- Regards Andrzej
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index a6f27648c015..c8fb45e7b06d 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -342,8 +342,7 @@ static int ti_sn_bridge_attach(struct drm_bridge *bridge) /* TODO: setting to 4 lanes always for now */ dsi->lanes = 4; dsi->format = MIPI_DSI_FMT_RGB888; - dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | - MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; + dsi->mode_flags = MIPI_DSI_MODE_VIDEO; /* check if continuous dsi clock is required or not */ pm_runtime_get_sync(pdata->dev);