| Message ID | 20190705095726.21433-4-niklas.cassel@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add support for QCOM Core Power Reduction | expand |
Reviewed-by: Ilia Lin <ilia.lin@kernel.org> On Fri, Jul 5, 2019 at 12:58 PM Niklas Cassel <niklas.cassel@linaro.org> wrote: > > Not all Qualcomm platforms need to care about the speedbin efuse, > nor the value blown into the speedbin efuse. > Therefore, make the nvmem-cells and opp-supported-hw properties > optional. > > Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> > --- > Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt > index 198441e80ba8..c5ea8b90e35d 100644 > --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt > +++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt > @@ -20,6 +20,10 @@ In 'cpus' nodes: > In 'operating-points-v2' table: > - compatible: Should be > - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996. > + > +Optional properties: > +-------------------- > +In 'operating-points-v2' table: > - nvmem-cells: A phandle pointing to a nvmem-cells node representing the > efuse registers that has information about the > speedbin that is used to select the right frequency/voltage > -- > 2.21.0 >
On Fri, 5 Jul 2019 11:57:14 +0200, Niklas Cassel wrote: > Not all Qualcomm platforms need to care about the speedbin efuse, > nor the value blown into the speedbin efuse. > Therefore, make the nvmem-cells and opp-supported-hw properties > optional. > > Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> > --- > Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt index 198441e80ba8..c5ea8b90e35d 100644 --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt +++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt @@ -20,6 +20,10 @@ In 'cpus' nodes: In 'operating-points-v2' table: - compatible: Should be - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996. + +Optional properties: +-------------------- +In 'operating-points-v2' table: - nvmem-cells: A phandle pointing to a nvmem-cells node representing the efuse registers that has information about the speedbin that is used to select the right frequency/voltage
Not all Qualcomm platforms need to care about the speedbin efuse, nor the value blown into the speedbin efuse. Therefore, make the nvmem-cells and opp-supported-hw properties optional. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> --- Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt | 4 ++++ 1 file changed, 4 insertions(+)