| Message ID | 20190709200801.42313-2-tomas.melin@vaisala.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | watchdog: cadence_wdt: Support all available prescaler values | expand |
On Tue, Jul 09, 2019 at 08:09:03PM +0000, Melin Tomas wrote: > Timeout calculation needs clock frequency, so init clock and calculate > prescaler value earlier in the probe. > > Preparational step for calculating maximum and minimum timeout values > for driver. > > Signed-off-by: Tomas Melin <tomas.melin@vaisala.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/cadence_wdt.c | 50 +++++++++++++++++----------------- > 1 file changed, 25 insertions(+), 25 deletions(-) > > diff --git a/drivers/watchdog/cadence_wdt.c b/drivers/watchdog/cadence_wdt.c > index a22f2d431a35..ddbf602bdc40 100644 > --- a/drivers/watchdog/cadence_wdt.c > +++ b/drivers/watchdog/cadence_wdt.c > @@ -300,6 +300,31 @@ static int cdns_wdt_probe(struct platform_device *pdev) > if (!wdt) > return -ENOMEM; > > + wdt->clk = devm_clk_get(dev, NULL); > + if (IS_ERR(wdt->clk)) { > + dev_err(dev, "input clock not found\n"); > + return PTR_ERR(wdt->clk); > + } > + > + ret = clk_prepare_enable(wdt->clk); > + if (ret) { > + dev_err(dev, "unable to enable clock\n"); > + return ret; > + } > + ret = devm_add_action_or_reset(dev, cdns_clk_disable_unprepare, > + wdt->clk); > + if (ret) > + return ret; > + > + clock_f = clk_get_rate(wdt->clk); > + if (clock_f <= CDNS_WDT_CLK_75MHZ) { > + wdt->prescaler = CDNS_WDT_PRESCALE_512; > + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; > + } else { > + wdt->prescaler = CDNS_WDT_PRESCALE_4096; > + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; > + } > + > cdns_wdt_device = &wdt->cdns_wdt_device; > cdns_wdt_device->info = &cdns_wdt_info; > cdns_wdt_device->ops = &cdns_wdt_ops; > @@ -333,31 +358,6 @@ static int cdns_wdt_probe(struct platform_device *pdev) > watchdog_stop_on_reboot(cdns_wdt_device); > watchdog_set_drvdata(cdns_wdt_device, wdt); > > - wdt->clk = devm_clk_get(dev, NULL); > - if (IS_ERR(wdt->clk)) { > - dev_err(dev, "input clock not found\n"); > - return PTR_ERR(wdt->clk); > - } > - > - ret = clk_prepare_enable(wdt->clk); > - if (ret) { > - dev_err(dev, "unable to enable clock\n"); > - return ret; > - } > - ret = devm_add_action_or_reset(dev, cdns_clk_disable_unprepare, > - wdt->clk); > - if (ret) > - return ret; > - > - clock_f = clk_get_rate(wdt->clk); > - if (clock_f <= CDNS_WDT_CLK_75MHZ) { > - wdt->prescaler = CDNS_WDT_PRESCALE_512; > - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; > - } else { > - wdt->prescaler = CDNS_WDT_PRESCALE_4096; > - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; > - } > - > spin_lock_init(&wdt->io_lock); > > watchdog_stop_on_reboot(cdns_wdt_device); > -- > 2.17.2 >
diff --git a/drivers/watchdog/cadence_wdt.c b/drivers/watchdog/cadence_wdt.c index a22f2d431a35..ddbf602bdc40 100644 --- a/drivers/watchdog/cadence_wdt.c +++ b/drivers/watchdog/cadence_wdt.c @@ -300,6 +300,31 @@ static int cdns_wdt_probe(struct platform_device *pdev) if (!wdt) return -ENOMEM; + wdt->clk = devm_clk_get(dev, NULL); + if (IS_ERR(wdt->clk)) { + dev_err(dev, "input clock not found\n"); + return PTR_ERR(wdt->clk); + } + + ret = clk_prepare_enable(wdt->clk); + if (ret) { + dev_err(dev, "unable to enable clock\n"); + return ret; + } + ret = devm_add_action_or_reset(dev, cdns_clk_disable_unprepare, + wdt->clk); + if (ret) + return ret; + + clock_f = clk_get_rate(wdt->clk); + if (clock_f <= CDNS_WDT_CLK_75MHZ) { + wdt->prescaler = CDNS_WDT_PRESCALE_512; + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; + } else { + wdt->prescaler = CDNS_WDT_PRESCALE_4096; + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; + } + cdns_wdt_device = &wdt->cdns_wdt_device; cdns_wdt_device->info = &cdns_wdt_info; cdns_wdt_device->ops = &cdns_wdt_ops; @@ -333,31 +358,6 @@ static int cdns_wdt_probe(struct platform_device *pdev) watchdog_stop_on_reboot(cdns_wdt_device); watchdog_set_drvdata(cdns_wdt_device, wdt); - wdt->clk = devm_clk_get(dev, NULL); - if (IS_ERR(wdt->clk)) { - dev_err(dev, "input clock not found\n"); - return PTR_ERR(wdt->clk); - } - - ret = clk_prepare_enable(wdt->clk); - if (ret) { - dev_err(dev, "unable to enable clock\n"); - return ret; - } - ret = devm_add_action_or_reset(dev, cdns_clk_disable_unprepare, - wdt->clk); - if (ret) - return ret; - - clock_f = clk_get_rate(wdt->clk); - if (clock_f <= CDNS_WDT_CLK_75MHZ) { - wdt->prescaler = CDNS_WDT_PRESCALE_512; - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; - } else { - wdt->prescaler = CDNS_WDT_PRESCALE_4096; - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; - } - spin_lock_init(&wdt->io_lock); watchdog_stop_on_reboot(cdns_wdt_device);
Timeout calculation needs clock frequency, so init clock and calculate prescaler value earlier in the probe. Preparational step for calculating maximum and minimum timeout values for driver. Signed-off-by: Tomas Melin <tomas.melin@vaisala.com> --- drivers/watchdog/cadence_wdt.c | 50 +++++++++++++++++----------------- 1 file changed, 25 insertions(+), 25 deletions(-)