diff mbox series

drm/atmel-hlcdc: set layer REP bit to enable replication logic

Message ID 1562686509-8747-1-git-send-email-joshua.henderson@microchip.com (mailing list archive)
State New, archived
Headers show
Series drm/atmel-hlcdc: set layer REP bit to enable replication logic | expand

Commit Message

Joshua Henderson July 9, 2019, 3:35 p.m. UTC
This bit enables replication logic to expand an RGB color less than 24
bits, to 24 bits, which is used internally for all formats.  Otherwise,
the least significant bits are always set to zero and the color may not
be what is expected.

Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
---
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Nicolas Ferre July 9, 2019, 4:24 p.m. UTC | #1
On 09/07/2019 at 17:35, Joshua Henderson wrote:
> This bit enables replication logic to expand an RGB color less than 24
> bits, to 24 bits, which is used internally for all formats.  Otherwise,
> the least significant bits are always set to zero and the color may not
> be what is expected.
> 
> Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>

Here is patchwork entry:
https://patchwork.kernel.org/patch/11037167/

Thanks, best regards,
   Nicolas

> ---
>   drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> index eb7c4cf..6f6cf61 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> @@ -389,7 +389,7 @@ atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
>   	atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,
>   				    cfg);
>   
> -	cfg = ATMEL_HLCDC_LAYER_DMA;
> +	cfg = ATMEL_HLCDC_LAYER_DMA | ATMEL_HLCDC_LAYER_REP;
>   
>   	if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {
>   		cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |
>
Sam Ravnborg July 12, 2019, 4:21 p.m. UTC | #2
Hi Joshua.

On Tue, Jul 09, 2019 at 04:24:49PM +0000, Nicolas.Ferre@microchip.com wrote:
> On 09/07/2019 at 17:35, Joshua Henderson wrote:
> > This bit enables replication logic to expand an RGB color less than 24
> > bits, to 24 bits, which is used internally for all formats.  Otherwise,
> > the least significant bits are always set to zero and the color may not
> > be what is expected.
> > 
> > Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
> 
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> 
> Here is patchwork entry:
> https://patchwork.kernel.org/patch/11037167/
> 
> Thanks, best regards,
>    Nicolas
> 
> > ---
> >   drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > index eb7c4cf..6f6cf61 100644
> > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > @@ -389,7 +389,7 @@ atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
> >   	atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,
> >   				    cfg);
> >   
> > -	cfg = ATMEL_HLCDC_LAYER_DMA;
> > +	cfg = ATMEL_HLCDC_LAYER_DMA | ATMEL_HLCDC_LAYER_REP;
> >   
> >   	if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {
> >   		cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |

Thanks - this gave me an opportunity to read a bit more in the datasheet
of the controller.
Applied to drm-misc-next with Ack from Nicolas.

	Sam
Boris Brezillon July 12, 2019, 4:27 p.m. UTC | #3
On Fri, 12 Jul 2019 18:21:17 +0200
Sam Ravnborg <sam@ravnborg.org> wrote:

> Hi Joshua.
> 
> On Tue, Jul 09, 2019 at 04:24:49PM +0000, Nicolas.Ferre@microchip.com wrote:
> > On 09/07/2019 at 17:35, Joshua Henderson wrote:  
> > > This bit enables replication logic to expand an RGB color less than 24
> > > bits, to 24 bits, which is used internally for all formats.  Otherwise,
> > > the least significant bits are always set to zero and the color may not
> > > be what is expected.
> > > 
> > > Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>  
> > 
> > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> > 
> > Here is patchwork entry:
> > https://patchwork.kernel.org/patch/11037167/
> > 
> > Thanks, best regards,
> >    Nicolas
> >   
> > > ---
> > >   drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
> > >   1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > > index eb7c4cf..6f6cf61 100644
> > > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > > @@ -389,7 +389,7 @@ atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
> > >   	atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,
> > >   				    cfg);
> > >   
> > > -	cfg = ATMEL_HLCDC_LAYER_DMA;
> > > +	cfg = ATMEL_HLCDC_LAYER_DMA | ATMEL_HLCDC_LAYER_REP;
> > >   
> > >   	if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {
> > >   		cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |  
> 
> Thanks - this gave me an opportunity to read a bit more in the datasheet
> of the controller.
> Applied to drm-misc-next with Ack from Nicolas.

I was about to add my R-b and ask you to apply the patch :-). I'm glad
you didn't wait for my feedback to apply the fix, that means I'll be
able to remove my name from the Atmel HLCDC entry soon ;-).

> 
> 	Sam
Boris Brezillon July 12, 2019, 4:32 p.m. UTC | #4
On Fri, 12 Jul 2019 18:21:17 +0200
Sam Ravnborg <sam@ravnborg.org> wrote:

> Hi Joshua.
> 
> On Tue, Jul 09, 2019 at 04:24:49PM +0000, Nicolas.Ferre@microchip.com wrote:
> > On 09/07/2019 at 17:35, Joshua Henderson wrote:  
> > > This bit enables replication logic to expand an RGB color less than 24
> > > bits, to 24 bits, which is used internally for all formats.  Otherwise,
> > > the least significant bits are always set to zero and the color may not
> > > be what is expected.
> > > 
> > > Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>  
> > 
> > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> > 
> > Here is patchwork entry:
> > https://patchwork.kernel.org/patch/11037167/
> > 
> > Thanks, best regards,
> >    Nicolas
> >   
> > > ---
> > >   drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
> > >   1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > > index eb7c4cf..6f6cf61 100644
> > > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> > > @@ -389,7 +389,7 @@ atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
> > >   	atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,
> > >   				    cfg);
> > >   
> > > -	cfg = ATMEL_HLCDC_LAYER_DMA;
> > > +	cfg = ATMEL_HLCDC_LAYER_DMA | ATMEL_HLCDC_LAYER_REP;
> > >   
> > >   	if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {
> > >   		cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |  
> 
> Thanks - this gave me an opportunity to read a bit more in the datasheet
> of the controller.
> Applied to drm-misc-next with Ack from Nicolas.

Was about to add my R-b and ask you to apply the patch. I'm glad you
didn't wait for my feedback though, that means I'll soon be able to
remove my name from the Atmel HLCDC entry in MAINTAINERS ;-).
diff mbox series

Patch

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
index eb7c4cf..6f6cf61 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
@@ -389,7 +389,7 @@  atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
 	atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,
 				    cfg);
 
-	cfg = ATMEL_HLCDC_LAYER_DMA;
+	cfg = ATMEL_HLCDC_LAYER_DMA | ATMEL_HLCDC_LAYER_REP;
 
 	if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {
 		cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |