| Message ID | 20190529083254.39581-3-chuanhua.han@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] gpio: mpc8xxx: Enable port input and interrupt | expand |
On Wed, May 29, 2019 at 3:32 AM Chuanhua Han <chuanhua.han@nxp.com> wrote: > > Since fsl-ls1088a Soc GPIO registers are used as little endian, > the patch adds the little-endian attribute to each gpio node. > > Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Acked-by: Li Yang <leoyang.li@nxp.com> > --- > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > index 661137ffa319..3e6d20d065bd 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > @@ -272,6 +272,7 @@ > compatible = "fsl,qoriq-gpio"; > reg = <0x0 0x2300000 0x0 0x10000>; > interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; > + little-endian; > gpio-controller; > #gpio-cells = <2>; > interrupt-controller; > @@ -282,6 +283,7 @@ > compatible = "fsl,qoriq-gpio"; > reg = <0x0 0x2310000 0x0 0x10000>; > interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; > + little-endian; > gpio-controller; > #gpio-cells = <2>; > interrupt-controller; > @@ -292,6 +294,7 @@ > compatible = "fsl,qoriq-gpio"; > reg = <0x0 0x2320000 0x0 0x10000>; > interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; > + little-endian; > gpio-controller; > #gpio-cells = <2>; > interrupt-controller; > @@ -302,6 +305,7 @@ > compatible = "fsl,qoriq-gpio"; > reg = <0x0 0x2330000 0x0 0x10000>; > interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; > + little-endian; > gpio-controller; > #gpio-cells = <2>; > interrupt-controller; > -- > 2.17.1 >
On Wed, May 29, 2019 at 04:32:54PM +0800, Chuanhua Han wrote: > Since fsl-ls1088a Soc GPIO registers are used as little endian, > the patch adds the little-endian attribute to each gpio node. > > Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index 661137ffa319..3e6d20d065bd 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -272,6 +272,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -282,6 +283,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2310000 0x0 0x10000>; interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -292,6 +294,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2320000 0x0 0x10000>; interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -302,6 +305,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2330000 0x0 0x10000>; interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller;
Since fsl-ls1088a Soc GPIO registers are used as little endian, the patch adds the little-endian attribute to each gpio node. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 4 ++++ 1 file changed, 4 insertions(+)