Message ID | 20190813174121.129593-2-stuart.summers@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/3] drm/i915: Use render class for MI_SET_CONTEXT | expand |
Quoting Stuart Summers (2019-08-13 18:41:20) > Use render class instead of RCS0 when printing CCID. > > Signed-off-by: Stuart Summers <stuart.summers@intel.com> One day, one day, this will be using some lists of registers. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
Quoting Chris Wilson (2019-08-13 18:55:46) > Quoting Stuart Summers (2019-08-13 18:41:20) > > Use render class instead of RCS0 when printing CCID. > > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com> > > One day, one day, this will be using some lists of registers. > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Pushed this patch. The first patch speaks of the panic if legacy HW does change and we end up with the rcs context somewhere else. And the third patch, I wish to develop into something of wider user. -Chris
On Wed, 2019-08-14 at 10:02 +0100, Chris Wilson wrote: > Quoting Chris Wilson (2019-08-13 18:55:46) > > Quoting Stuart Summers (2019-08-13 18:41:20) > > > Use render class instead of RCS0 when printing CCID. > > > > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com> > > > > One day, one day, this will be using some lists of registers. > > > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> > > Pushed this patch. The first patch speaks of the panic if legacy HW > does > change and we end up with the rcs context somewhere else. And the > third > patch, I wish to develop into something of wider user. Thanks Chris! -Stuart > -Chris
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index c7b241417ee1..50b13ca29877 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -1202,7 +1202,7 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine, unsigned long flags; u64 addr; - if (engine->id == RCS0 && IS_GEN_RANGE(dev_priv, 4, 7)) + if (engine->id == RENDER_CLASS && IS_GEN_RANGE(dev_priv, 4, 7)) drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); drm_printf(m, "\tRING_START: 0x%08x\n", ENGINE_READ(engine, RING_START));
Use render class instead of RCS0 when printing CCID. Signed-off-by: Stuart Summers <stuart.summers@intel.com> --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)