| Message ID | 20190820230544.170010-7-stuart.summers@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Refactor to expand subslice mask (rev 2) | expand |
Quoting Stuart Summers (2019-08-21 00:05:39) > Add a new function to set a set of subslices for a given > slice. > > Signed-off-by: Stuart Summers <stuart.summers@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_sseu.c | 6 ++++++ > drivers/gpu/drm/i915/gt/intel_sseu.h | 3 +++ > drivers/gpu/drm/i915/intel_device_info.c | 18 +++++++++++------- > 3 files changed, 20 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c > index 3a5c0f7b5a08..79a9b5f186f9 100644 > --- a/drivers/gpu/drm/i915/gt/intel_sseu.c > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c > @@ -30,6 +30,12 @@ intel_sseu_subslice_total(const struct sseu_dev_info *sseu) > return total; > } > > +void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice, > + u8 ss_mask) > +{ > + sseu->subslice_mask[i] = ss_mask & 0xff; What's i? -Chris
On Wed, 2019-08-21 at 23:32 +0100, Chris Wilson wrote: > Quoting Stuart Summers (2019-08-21 00:05:39) > > Add a new function to set a set of subslices for a given > > slice. > > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com> > > --- > > drivers/gpu/drm/i915/gt/intel_sseu.c | 6 ++++++ > > drivers/gpu/drm/i915/gt/intel_sseu.h | 3 +++ > > drivers/gpu/drm/i915/intel_device_info.c | 18 +++++++++++------- > > 3 files changed, 20 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c > > b/drivers/gpu/drm/i915/gt/intel_sseu.c > > index 3a5c0f7b5a08..79a9b5f186f9 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_sseu.c > > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c > > @@ -30,6 +30,12 @@ intel_sseu_subslice_total(const struct > > sseu_dev_info *sseu) > > return total; > > } > > > > +void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int > > slice, > > + u8 ss_mask) > > +{ > > + sseu->subslice_mask[i] = ss_mask & 0xff; > > What's i? Should be slice, not i :( not sure why the build wasn't catching this. I'll fix in the next revision, thanks for the catch! - Stuart > -Chris
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c index 3a5c0f7b5a08..79a9b5f186f9 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.c +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c @@ -30,6 +30,12 @@ intel_sseu_subslice_total(const struct sseu_dev_info *sseu) return total; } +void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice, + u8 ss_mask) +{ + sseu->subslice_mask[i] = ss_mask & 0xff; +} + unsigned int intel_sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice) { diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h index fe22d5b18e67..3099e04611ce 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.h +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h @@ -75,6 +75,9 @@ intel_sseu_subslice_total(const struct sseu_dev_info *sseu); unsigned int intel_sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice); +void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice, + u8 ss_mask); + u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, const struct intel_sseu *req_sseu); diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 52515efe9f4e..1a45728ac712 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -206,7 +206,10 @@ static void gen11_sseu_info_init(struct drm_i915_private *dev_priv) int ss; sseu->slice_mask |= BIT(s); - sseu->subslice_mask[s] = (ss_en >> ss_idx) & ss_en_mask; + + intel_sseu_set_subslices(sseu, s, (ss_en >> ss_idx) & + ss_en_mask); + for (ss = 0; ss < sseu->max_subslices; ss++) { if (sseu->subslice_mask[s] & BIT(ss)) sseu_set_eus(sseu, s, ss, eu_en); @@ -274,8 +277,9 @@ static void gen10_sseu_info_init(struct drm_i915_private *dev_priv) * Slice0 can have up to 3 subslices, but there are only 2 in * slice1/2. */ - sseu->subslice_mask[s] = s == 0 ? subslice_mask_with_eus : - subslice_mask_with_eus & 0x3; + intel_sseu_set_subslices(sseu, s, s == 0 ? + subslice_mask_with_eus : + subslice_mask_with_eus & 0x3); } sseu->eu_total = compute_eu_total(sseu); @@ -330,7 +334,7 @@ static void cherryview_sseu_info_init(struct drm_i915_private *dev_priv) sseu_set_eus(sseu, 0, 1, ~disabled_mask); } - sseu->subslice_mask[0] = subslice_mask; + intel_sseu_set_subslices(sseu, 0, subslice_mask); sseu->eu_total = compute_eu_total(sseu); @@ -384,7 +388,7 @@ static void gen9_sseu_info_init(struct drm_i915_private *dev_priv) /* skip disabled slice */ continue; - sseu->subslice_mask[s] = subslice_mask; + intel_sseu_set_subslices(sseu, s, subslice_mask); eu_disable = I915_READ(GEN9_EU_DISABLE(s)); for (ss = 0; ss < sseu->max_subslices; ss++) { @@ -491,7 +495,7 @@ static void broadwell_sseu_info_init(struct drm_i915_private *dev_priv) /* skip disabled slice */ continue; - sseu->subslice_mask[s] = subslice_mask; + intel_sseu_set_subslices(sseu, s, subslice_mask); for (ss = 0; ss < sseu->max_subslices; ss++) { u8 eu_disabled_mask; @@ -588,7 +592,7 @@ static void haswell_sseu_info_init(struct drm_i915_private *dev_priv) sseu->eu_per_subslice); for (s = 0; s < sseu->max_slices; s++) { - sseu->subslice_mask[s] = subslice_mask; + intel_sseu_set_subslices(sseu, s, subslice_mask); for (ss = 0; ss < sseu->max_subslices; ss++) { sseu_set_eus(sseu, s, ss,
Add a new function to set a set of subslices for a given slice. Signed-off-by: Stuart Summers <stuart.summers@intel.com> --- drivers/gpu/drm/i915/gt/intel_sseu.c | 6 ++++++ drivers/gpu/drm/i915/gt/intel_sseu.h | 3 +++ drivers/gpu/drm/i915/intel_device_info.c | 18 +++++++++++------- 3 files changed, 20 insertions(+), 7 deletions(-)