| Message ID | 20190801110122.26834-2-ran.bi@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add Support for MediaTek MT2712 RTC | expand |
On 01/08/2019 13:01, Ran Bi wrote: > Document the binding for MT2712 RTC implemented by rtc-mt2712. > > Signed-off-by: Ran Bi <ran.bi@mediatek.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > .../devicetree/bindings/rtc/rtc-mt2712.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > create mode 100644 Documentation/devicetree/bindings/rtc/rtc-mt2712.txt > > diff --git a/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt b/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt > new file mode 100644 > index 000000000000..c33d87e5e753 > --- /dev/null > +++ b/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt > @@ -0,0 +1,14 @@ > +Device-Tree bindings for MediaTek SoC based RTC > + > +Required properties: > +- compatible : Should be "mediatek,mt2712-rtc" : for MT2712 SoC > +- reg : Specifies base physical address and size of the registers; > +- interrupts : Should contain the interrupt for RTC alarm; No clocks for the RTC? What about CLK_TOP_RTC_SEL from the clk driver? Regards, Matthias > + > +Example: > + > +rtc: rtc@10011000 { > + compatible = "mediatek,mt2712-rtc"; > + reg = <0 0x10011000 0 0x1000>; > + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_LOW>; > +}; >
Hi, > > +Required properties: > > +- compatible : Should be "mediatek,mt2712-rtc" : for MT2712 SoC > > +- reg : Specifies base physical address and size of the registers; > > +- interrupts : Should contain the interrupt for RTC alarm; > > No clocks for the RTC? What about CLK_TOP_RTC_SEL from the clk driver? > > Regards, > Matthias > I suppose that we don't need clock control for mt2712 RTC. RTC clock is directly come from 32K crystal and there is no control register to switch the clock. In mt2712, CLK_TOP_RTC_SEL is prepared for other module even it called CLK_TOP_RTC_SEL. Regards, Ran > > + > > +Example: > > + > > +rtc: rtc@10011000 { > > + compatible = "mediatek,mt2712-rtc"; > > + reg = <0 0x10011000 0 0x1000>; > > + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_LOW>; > > +}; > >
diff --git a/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt b/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt new file mode 100644 index 000000000000..c33d87e5e753 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/rtc-mt2712.txt @@ -0,0 +1,14 @@ +Device-Tree bindings for MediaTek SoC based RTC + +Required properties: +- compatible : Should be "mediatek,mt2712-rtc" : for MT2712 SoC +- reg : Specifies base physical address and size of the registers; +- interrupts : Should contain the interrupt for RTC alarm; + +Example: + +rtc: rtc@10011000 { + compatible = "mediatek,mt2712-rtc"; + reg = <0 0x10011000 0 0x1000>; + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_LOW>; +};