| Message ID | 20190820084932.22282-7-bibby.hsieh@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | support gce on mt8183 platform | expand |
On 20/08/2019 10:49, Bibby Hsieh wrote: > GCE hardware stored event information in own internal sysram, > if the initial value in those sysram is not zero value > it will cause a situation that gce can wait the event immediately > after client ask gce to wait event but not really trigger the > corresponding hardware. > > In order to make sure that the wait event function is > exactly correct, we need to clear the sysram value in > cmdq initial flow. > > Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver") > > Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> > Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > drivers/mailbox/mtk-cmdq-mailbox.c | 5 +++++ > include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ > include/linux/soc/mediatek/mtk-cmdq.h | 3 --- > 3 files changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c > index 69daaadc3a5f..9a6ce9f5a7db 100644 > --- a/drivers/mailbox/mtk-cmdq-mailbox.c > +++ b/drivers/mailbox/mtk-cmdq-mailbox.c > @@ -21,6 +21,7 @@ > #define CMDQ_NUM_CMD(t) (t->cmd_buf_size / CMDQ_INST_SIZE) > > #define CMDQ_CURR_IRQ_STATUS 0x10 > +#define CMDQ_SYNC_TOKEN_UPDATE 0x68 > #define CMDQ_THR_SLOT_CYCLES 0x30 > #define CMDQ_THR_BASE 0x100 > #define CMDQ_THR_SIZE 0x80 > @@ -104,8 +105,12 @@ static void cmdq_thread_resume(struct cmdq_thread *thread) > > static void cmdq_init(struct cmdq *cmdq) > { > + int i; > + > WARN_ON(clk_enable(cmdq->clock) < 0); > writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES); > + for (i = 0; i <= CMDQ_MAX_EVENT; i++) > + writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); > clk_disable(cmdq->clock); > } > > diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h > index ccb73422c2fa..911475da7a53 100644 > --- a/include/linux/mailbox/mtk-cmdq-mailbox.h > +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h > @@ -19,6 +19,8 @@ > #define CMDQ_WFE_UPDATE BIT(31) > #define CMDQ_WFE_WAIT BIT(15) > #define CMDQ_WFE_WAIT_VALUE 0x1 > +/** cmdq event maximum */ > +#define CMDQ_MAX_EVENT 0x3ff > > /* > * CMDQ_CODE_MASK: > diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h > index 54ade13a9b15..4e8899972db4 100644 > --- a/include/linux/soc/mediatek/mtk-cmdq.h > +++ b/include/linux/soc/mediatek/mtk-cmdq.h > @@ -13,9 +13,6 @@ > > #define CMDQ_NO_TIMEOUT 0xffffffffu > > -/** cmdq event maximum */ > -#define CMDQ_MAX_EVENT 0x3ff > - > struct cmdq_pkt; > > struct cmdq_client { >
On 23/08/2019 13:36, Matthias Brugger wrote: > > > On 20/08/2019 10:49, Bibby Hsieh wrote: >> GCE hardware stored event information in own internal sysram, >> if the initial value in those sysram is not zero value >> it will cause a situation that gce can wait the event immediately >> after client ask gce to wait event but not really trigger the >> corresponding hardware. >> >> In order to make sure that the wait event function is >> exactly correct, we need to clear the sysram value in >> cmdq initial flow. >> >> Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver") >> >> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> >> Reviewed-by: CK Hu <ck.hu@mediatek.com> I oversaw some things/nits. Patch subject should be: mailbox: mediatek: cmdq: clear the event in cmdq initial flow >> --- >> drivers/mailbox/mtk-cmdq-mailbox.c | 5 +++++ >> include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ >> include/linux/soc/mediatek/mtk-cmdq.h | 3 --- >> 3 files changed, 7 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c >> index 69daaadc3a5f..9a6ce9f5a7db 100644 >> --- a/drivers/mailbox/mtk-cmdq-mailbox.c >> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c >> @@ -21,6 +21,7 @@ >> #define CMDQ_NUM_CMD(t) (t->cmd_buf_size / CMDQ_INST_SIZE) >> >> #define CMDQ_CURR_IRQ_STATUS 0x10 >> +#define CMDQ_SYNC_TOKEN_UPDATE 0x68 >> #define CMDQ_THR_SLOT_CYCLES 0x30 >> #define CMDQ_THR_BASE 0x100 >> #define CMDQ_THR_SIZE 0x80 >> @@ -104,8 +105,12 @@ static void cmdq_thread_resume(struct cmdq_thread *thread) >> >> static void cmdq_init(struct cmdq *cmdq) >> { >> + int i; >> + >> WARN_ON(clk_enable(cmdq->clock) < 0); >> writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES); >> + for (i = 0; i <= CMDQ_MAX_EVENT; i++) >> + writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); I think CMDQ_SYNC_TOKEN_UPDATE is not a good name for the define. Any reason why we couldn't name it something like CMDQ_SYNC_TOKEN_RESET? >> clk_disable(cmdq->clock); >> } >> >> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h >> index ccb73422c2fa..911475da7a53 100644 >> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h >> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h >> @@ -19,6 +19,8 @@ >> #define CMDQ_WFE_UPDATE BIT(31) >> #define CMDQ_WFE_WAIT BIT(15) >> #define CMDQ_WFE_WAIT_VALUE 0x1 >> +/** cmdq event maximum */ While at it, add a new line before the comment. Regards, Matthias >> +#define CMDQ_MAX_EVENT 0x3ff >> >> /* >> * CMDQ_CODE_MASK: >> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h >> index 54ade13a9b15..4e8899972db4 100644 >> --- a/include/linux/soc/mediatek/mtk-cmdq.h >> +++ b/include/linux/soc/mediatek/mtk-cmdq.h >> @@ -13,9 +13,6 @@ >> >> #define CMDQ_NO_TIMEOUT 0xffffffffu >> >> -/** cmdq event maximum */ >> -#define CMDQ_MAX_EVENT 0x3ff >> - >> struct cmdq_pkt; >> >> struct cmdq_client { >>
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index 69daaadc3a5f..9a6ce9f5a7db 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -21,6 +21,7 @@ #define CMDQ_NUM_CMD(t) (t->cmd_buf_size / CMDQ_INST_SIZE) #define CMDQ_CURR_IRQ_STATUS 0x10 +#define CMDQ_SYNC_TOKEN_UPDATE 0x68 #define CMDQ_THR_SLOT_CYCLES 0x30 #define CMDQ_THR_BASE 0x100 #define CMDQ_THR_SIZE 0x80 @@ -104,8 +105,12 @@ static void cmdq_thread_resume(struct cmdq_thread *thread) static void cmdq_init(struct cmdq *cmdq) { + int i; + WARN_ON(clk_enable(cmdq->clock) < 0); writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES); + for (i = 0; i <= CMDQ_MAX_EVENT; i++) + writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); clk_disable(cmdq->clock); } diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h index ccb73422c2fa..911475da7a53 100644 --- a/include/linux/mailbox/mtk-cmdq-mailbox.h +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h @@ -19,6 +19,8 @@ #define CMDQ_WFE_UPDATE BIT(31) #define CMDQ_WFE_WAIT BIT(15) #define CMDQ_WFE_WAIT_VALUE 0x1 +/** cmdq event maximum */ +#define CMDQ_MAX_EVENT 0x3ff /* * CMDQ_CODE_MASK: diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 54ade13a9b15..4e8899972db4 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -13,9 +13,6 @@ #define CMDQ_NO_TIMEOUT 0xffffffffu -/** cmdq event maximum */ -#define CMDQ_MAX_EVENT 0x3ff - struct cmdq_pkt; struct cmdq_client {
GCE hardware stored event information in own internal sysram, if the initial value in those sysram is not zero value it will cause a situation that gce can wait the event immediately after client ask gce to wait event but not really trigger the corresponding hardware. In order to make sure that the wait event function is exactly correct, we need to clear the sysram value in cmdq initial flow. Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver") Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> --- drivers/mailbox/mtk-cmdq-mailbox.c | 5 +++++ include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ include/linux/soc/mediatek/mtk-cmdq.h | 3 --- 3 files changed, 7 insertions(+), 3 deletions(-)