| Message ID | 1567157008-29679-1-git-send-email-puwen@hygon.cn (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [RFC] tools/power turbostat: Add support for Hygon Fam 18h (Dhyana) RAPL | expand |
On Fri, 2019-08-30 at 17:23 +0800, Pu Wen wrote: > Commit 9392bd98bba760be96ee ("tools/power turbostat: Add support for > AMD > Fam 17h (Zen) RAPL") and the commit 3316f99a9f1b68c578c5 > ("tools/power > turbostat: Also read package power on AMD F17h (Zen)") add AMD Fam > 17h > RAPL support. > > Hygon Family 18h(Dhyana) support RAPL in bit 14 of CPUID 0x80000007 > EDX, > and has MSRs RAPL_PWR_UNIT/CORE_ENERGY_STAT/PKG_ENERGY_STAT. So add > Hygon > Dhyana Family 18h support for RAPL. > > Already tested on Hygon multi-node systems and it shows correct per- > core > energy usage and the total package power. I was a bit worried about these two chunks, since as far as I know AMD has not yet released any processor with family 0x18, so there might be future conflicts: > @@ -3803,6 +3804,7 @@ double get_tdp_amd(unsigned int family) > { > switch (family) { > case 0x17: > + case 0x18: > default: > > @@ -3982,6 +3984,7 @@ void rapl_probe_amd(unsigned int family, > unsigned int model) > > switch (family) { > case 0x17: /* Zen, Zen+ */ > + case 0x18: > do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY; > if (rapl_joules) { > BIC_PRESENT(BIC_Pkg_J); But the second switch is already guarded by the CPUID check for the rapl support, so it will either "just work" if AMD's family 0x18 chip uses the same RAPL registers - or cleanly skip the CPU if they changed it. Please add a comment on the 0x18 case in the rapl_probe_amd function, something like: case 0x18: /* Hygon Dhyana */ Feel free to add a Reviewed-by: Calvin Walton <calvin.walton@kepstin.ca>
On 2019/8/30 22:27, Calvin Walton wrote: > I was a bit worried about these two chunks, since as far as I know AMD > has not yet released any processor with family 0x18, so there might be > future conflicts: Hygon negotiated with AMD to make sure that only Hygon will use family 18h. > Please add a comment on the 0x18 case in the rapl_probe_amd function, > something like: > case 0x18: /* Hygon Dhyana */ Okay, thanks for the suggestion. > Feel free to add a > Reviewed-by: Calvin Walton <calvin.walton@kepstin.ca> Thanks a lot.
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 1cd28eb..f2629b1 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -60,6 +60,7 @@ unsigned int do_irtl_hsw; unsigned int units = 1000000; /* MHz etc */ unsigned int genuine_intel; unsigned int authentic_amd; +unsigned int hygon_genuine; unsigned int max_level, max_extended_level; unsigned int has_invariant_tsc; unsigned int do_nhm_platform_info; @@ -1714,7 +1715,7 @@ void get_apic_id(struct thread_data *t) if (!DO_BIC(BIC_X2APIC)) return; - if (authentic_amd) { + if (authentic_amd || hygon_genuine) { unsigned int topology_extensions; if (max_extended_level < 0x8000001e) @@ -3803,6 +3804,7 @@ double get_tdp_amd(unsigned int family) { switch (family) { case 0x17: + case 0x18: default: /* This is the max stock TDP of HEDT/Server Fam17h chips */ return 250.0; @@ -3982,6 +3984,7 @@ void rapl_probe_amd(unsigned int family, unsigned int model) switch (family) { case 0x17: /* Zen, Zen+ */ + case 0x18: do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY; if (rapl_joules) { BIC_PRESENT(BIC_Pkg_J); @@ -4018,7 +4021,7 @@ void rapl_probe(unsigned int family, unsigned int model) { if (genuine_intel) rapl_probe_intel(family, model); - if (authentic_amd) + if (authentic_amd || hygon_genuine) rapl_probe_amd(family, model); } @@ -4600,6 +4603,8 @@ void process_cpuid() genuine_intel = 1; else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65) authentic_amd = 1; + else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e) + hygon_genuine = 1; if (!quiet) fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
Commit 9392bd98bba760be96ee ("tools/power turbostat: Add support for AMD Fam 17h (Zen) RAPL") and the commit 3316f99a9f1b68c578c5 ("tools/power turbostat: Also read package power on AMD F17h (Zen)") add AMD Fam 17h RAPL support. Hygon Family 18h(Dhyana) support RAPL in bit 14 of CPUID 0x80000007 EDX, and has MSRs RAPL_PWR_UNIT/CORE_ENERGY_STAT/PKG_ENERGY_STAT. So add Hygon Dhyana Family 18h support for RAPL. Already tested on Hygon multi-node systems and it shows correct per-core energy usage and the total package power. Signed-off-by: Pu Wen <puwen@hygon.cn> --- tools/power/x86/turbostat/turbostat.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)