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[v2,02/28] s390x/tcg: MVCL: Zero out unused bits of address

Message ID 20190906075750.14791-3-david@redhat.com (mailing list archive)
State New, archived
Headers show
Series s390x/tcg: mem_helper: Fault-safe handling | expand

Commit Message

David Hildenbrand Sept. 6, 2019, 7:57 a.m. UTC
We have to zero out unused bits in 24 and 31-bit addressing mode.
Provide a new helper.

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/mem_helper.c | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

Comments

Richard Henderson Sept. 11, 2019, 2:40 p.m. UTC | #1
On 9/6/19 3:57 AM, David Hildenbrand wrote:
> We have to zero out unused bits in 24 and 31-bit addressing mode.
> Provide a new helper.
> 
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
>  target/s390x/mem_helper.c | 24 ++++++++++++++++++++++--
>  1 file changed, 22 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


> diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
> index 39ee9b3175..3152bdafe2 100644
> --- a/target/s390x/mem_helper.c
> +++ b/target/s390x/mem_helper.c
> @@ -469,6 +469,26 @@ static inline uint64_t get_address(CPUS390XState *env, int reg)
>      return wrap_address(env, env->regs[reg]);
>  }
>  
> +/*
> + * Store the address to the given register, zeroing out unused leftmost
> + * bits in bit positions 32-63 (24-bit and 31-bit mode only).
> + */
> +static inline void set_address_zero(CPUS390XState *env, int reg,
> +                                    uint64_t address)
> +{
> +    if (env->psw.mask & PSW_MASK_64) {
> +        env->regs[reg] = address;
> +    } else {
> +        if (!(env->psw.mask & PSW_MASK_32)) {
> +            address &= 0x00ffffff;
> +            env->regs[reg] = deposit64(env->regs[reg], 0, 32, address);
> +        } else {
> +            address &= 0x7fffffff;
> +            env->regs[reg] = deposit64(env->regs[reg], 0, 32, address);
> +        }

You could perhaps sink the deposit and store line into the outer else.


r~
David Hildenbrand Sept. 11, 2019, 4:10 p.m. UTC | #2
On 11.09.19 16:40, Richard Henderson wrote:
> On 9/6/19 3:57 AM, David Hildenbrand wrote:
>> We have to zero out unused bits in 24 and 31-bit addressing mode.
>> Provide a new helper.
>>
>> Signed-off-by: David Hildenbrand <david@redhat.com>
>> ---
>>  target/s390x/mem_helper.c | 24 ++++++++++++++++++++++--
>>  1 file changed, 22 insertions(+), 2 deletions(-)
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> 
>> diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
>> index 39ee9b3175..3152bdafe2 100644
>> --- a/target/s390x/mem_helper.c
>> +++ b/target/s390x/mem_helper.c
>> @@ -469,6 +469,26 @@ static inline uint64_t get_address(CPUS390XState *env, int reg)
>>      return wrap_address(env, env->regs[reg]);
>>  }
>>  
>> +/*
>> + * Store the address to the given register, zeroing out unused leftmost
>> + * bits in bit positions 32-63 (24-bit and 31-bit mode only).
>> + */
>> +static inline void set_address_zero(CPUS390XState *env, int reg,
>> +                                    uint64_t address)
>> +{
>> +    if (env->psw.mask & PSW_MASK_64) {
>> +        env->regs[reg] = address;
>> +    } else {
>> +        if (!(env->psw.mask & PSW_MASK_32)) {
>> +            address &= 0x00ffffff;
>> +            env->regs[reg] = deposit64(env->regs[reg], 0, 32, address);
>> +        } else {
>> +            address &= 0x7fffffff;
>> +            env->regs[reg] = deposit64(env->regs[reg], 0, 32, address);
>> +        }
> 
> You could perhaps sink the deposit and store line into the outer else.
> 

Thanks, will do!
diff mbox series

Patch

diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 39ee9b3175..3152bdafe2 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -469,6 +469,26 @@  static inline uint64_t get_address(CPUS390XState *env, int reg)
     return wrap_address(env, env->regs[reg]);
 }
 
+/*
+ * Store the address to the given register, zeroing out unused leftmost
+ * bits in bit positions 32-63 (24-bit and 31-bit mode only).
+ */
+static inline void set_address_zero(CPUS390XState *env, int reg,
+                                    uint64_t address)
+{
+    if (env->psw.mask & PSW_MASK_64) {
+        env->regs[reg] = address;
+    } else {
+        if (!(env->psw.mask & PSW_MASK_32)) {
+            address &= 0x00ffffff;
+            env->regs[reg] = deposit64(env->regs[reg], 0, 32, address);
+        } else {
+            address &= 0x7fffffff;
+            env->regs[reg] = deposit64(env->regs[reg], 0, 32, address);
+        }
+    }
+}
+
 static inline void set_address(CPUS390XState *env, int reg, uint64_t address)
 {
     if (env->psw.mask & PSW_MASK_64) {
@@ -772,8 +792,8 @@  uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1, uint32_t r2)
 
     env->regs[r1 + 1] = deposit64(env->regs[r1 + 1], 0, 24, destlen);
     env->regs[r2 + 1] = deposit64(env->regs[r2 + 1], 0, 24, srclen);
-    set_address(env, r1, dest);
-    set_address(env, r2, src);
+    set_address_zero(env, r1, dest);
+    set_address_zero(env, r2, src);
 
     return cc;
 }