| Message ID | 1568081408-26800-1-git-send-email-aisheng.dong@nxp.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | clk: imx8: add new clock binding for better pm support | expand |
> This patch series is a preparation for the MX8 Architecture improvement. > As for IMX SCU based platforms like MX8QM and MX8QXP, they are comprised > of a couple of SS(Subsystems) while most of them within the same SS can be > shared. e.g. Clocks, Devices and etc. > > However, current clock binding is using SW IDs for device tree to use which can > cause troubles in writing the common <soc>-ss-xx.dtsi file for different SoCs. > > This patch series aims to introduce a new binding which is more close to > hardware and platform independent and can makes us write a more general > drivers for different SCU based SoCs. > > Another important thing is that on MX8, each Clock resource is associated with > a power domain. So we have to attach that clock device to the power domain > in order to make it work properly. Further more, the clock state will be lost > when its power domain is completely off during suspend/resume, so we also > introduce the clock state save&restore mechanism. > For this patch series, missed to add Oliver's former tag: Tested-by: Oliver Graute <oliver.graute@kococonnector.com> Regards Aisheng
Quoting Dong Aisheng (2019-09-09 19:09:57) > This is a follow up of this patch series. > https://patchwork.kernel.org/cover/10924029/ > [V2,0/2] clk: imx: scu: add parsing clocks from device tree support > > This patch series is a preparation for the MX8 Architecture improvement. > As for IMX SCU based platforms like MX8QM and MX8QXP, they are comprised > of a couple of SS(Subsystems) while most of them within the same SS > can be shared. e.g. Clocks, Devices and etc. > > However, current clock binding is using SW IDs for device tree to use > which can cause troubles in writing the common <soc>-ss-xx.dtsi file for > different SoCs. > > This patch series aims to introduce a new binding which is more close to > hardware and platform independent and can makes us write a more general > drivers for different SCU based SoCs. > > Another important thing is that on MX8, each Clock resource is associated > with a power domain. So we have to attach that clock device to the power > domain in order to make it work properly. Further more, the clock state > will be lost when its power domain is completely off during suspend/resume, > so we also introduce the clock state save&restore mechanism. I had some more comments on v4. I'm going to wait for those to be addressed before reviewing this series.
On 09/09/19, Dong Aisheng wrote: > This is a follow up of this patch series. > https://patchwork.kernel.org/cover/10924029/ > [V2,0/2] clk: imx: scu: add parsing clocks from device tree support Hello Aisheng, will there be an updated version of this two patch series for recent linux-next? Then I can test it on my two imx8qm boards. Best regards, Oliver
On Thu, Nov 14, 2019 at 8:22 PM Oliver Graute <oliver.graute@gmail.com> wrote: > > On 09/09/19, Dong Aisheng wrote: > > This is a follow up of this patch series. > > https://patchwork.kernel.org/cover/10924029/ > > [V2,0/2] clk: imx: scu: add parsing clocks from device tree support > Hello Aisheng, > > will there be an updated version of this two patch series for recent > linux-next? Then I can test it on my two imx8qm boards. > Yes, i prepared them already. Will send you in private email cause i don't have a public git. Regards Aisheng > Best regards, > > Oliver
Hi Stephen, On Wed, Sep 18, 2019 at 2:21 PM Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Dong Aisheng (2019-09-09 19:09:57) > > This is a follow up of this patch series. > > https://patchwork.kernel.org/cover/10924029/ > > [V2,0/2] clk: imx: scu: add parsing clocks from device tree support > > > > This patch series is a preparation for the MX8 Architecture improvement. > > As for IMX SCU based platforms like MX8QM and MX8QXP, they are comprised > > of a couple of SS(Subsystems) while most of them within the same SS > > can be shared. e.g. Clocks, Devices and etc. > > > > However, current clock binding is using SW IDs for device tree to use > > which can cause troubles in writing the common <soc>-ss-xx.dtsi file for > > different SoCs. > > > > This patch series aims to introduce a new binding which is more close to > > hardware and platform independent and can makes us write a more general > > drivers for different SCU based SoCs. > > > > Another important thing is that on MX8, each Clock resource is associated > > with a power domain. So we have to attach that clock device to the power > > domain in order to make it work properly. Further more, the clock state > > will be lost when its power domain is completely off during suspend/resume, > > so we also introduce the clock state save&restore mechanism. > > I had some more comments on v4. I'm going to wait for those to be > addressed before reviewing this series. > Yes, i have addressed all your comments and resend v5. Could you help have a look at it? https://patchwork.kernel.org/cover/11248249/ Regards Aisheng
On Tue, 2019-09-17 at 23:08 -0700, Stephen Boyd wrote: > Quoting Dong Aisheng (2019-09-09 19:09:57) > > This is a follow up of this patch series. > > [V2,0/2] clk: imx: scu: add parsing clocks from device tree support > > > > This patch series is a preparation for the MX8 Architecture > > improvement. > > As for IMX SCU based platforms like MX8QM and MX8QXP, they are > > comprised > > of a couple of SS(Subsystems) while most of them within the same SS > > can be shared. e.g. Clocks, Devices and etc. > > > > However, current clock binding is using SW IDs for device tree to > > use > > which can cause troubles in writing the common <soc>-ss-xx.dtsi > > file for > > different SoCs. > > > > This patch series aims to introduce a new binding which is more > > close to > > hardware and platform independent and can makes us write a more > > general > > drivers for different SCU based SoCs. > > > > Another important thing is that on MX8, each Clock resource is > > associated > > with a power domain. So we have to attach that clock device to the > > power > > domain in order to make it work properly. Further more, the clock > > state > > will be lost when its power domain is completely off during > > suspend/resume, > > so we also introduce the clock state save&restore mechanism. > > I had some more comments on v4. I'm going to wait for those to be > addressed before reviewing this series. Hi Aisheng, Are the comments from Stephen addressed yet? I noticed that you did a RESEND of V5 with the comment: > ChangeLog: > v4->v5: > * Address all comments from Stephen You can add my: Tested-by: Daniel Baluta <daniel.baluta@nxp.com> for patches send with tag : RESEND v5. thanks, Daniel.
This is a follow up of this patch series. https://patchwork.kernel.org/cover/10924029/ [V2,0/2] clk: imx: scu: add parsing clocks from device tree support This patch series is a preparation for the MX8 Architecture improvement. As for IMX SCU based platforms like MX8QM and MX8QXP, they are comprised of a couple of SS(Subsystems) while most of them within the same SS can be shared. e.g. Clocks, Devices and etc. However, current clock binding is using SW IDs for device tree to use which can cause troubles in writing the common <soc>-ss-xx.dtsi file for different SoCs. This patch series aims to introduce a new binding which is more close to hardware and platform independent and can makes us write a more general drivers for different SCU based SoCs. Another important thing is that on MX8, each Clock resource is associated with a power domain. So we have to attach that clock device to the power domain in order to make it work properly. Further more, the clock state will be lost when its power domain is completely off during suspend/resume, so we also introduce the clock state save&restore mechanism. ChangeLog: v4->v5: * Address many comments from Stephen v3->v4: * use clk-indices for LPCG to fetch each clks offset from dt v2->v3: * change scu clk into two cells binding * add clk pm patches to ease the understand of the changes v1->v2: * SCU clock changed to one cell clock binding inspired by arm,scpi.txt Documentation/devicetree/bindings/arm/arm,scpi.txt * Add required power domain property * Dropped PATCH 3&4 first, will send the updated version accordingly after the binding is finally determined, Dong Aisheng (11): dt-bindings: firmware: imx-scu: new binding to parse clocks from device tree dt-bindings: clock: imx-lpcg: add support to parse clocks from device tree clk: imx: scu: add two cells binding support clk: imx: scu: bypass cpu power domains clk: imx: scu: allow scu clk to take device pointer clk: imx: scu: add runtime pm support clk: imx: scu: add suspend/resume support clk: imx: imx8qxp-lpcg: add parsing clocks from device tree clk: imx: lpcg: allow lpcg clk to take device pointer clk: imx: clk-imx8qxp-lpcg: add runtime pm support clk: imx: lpcg: add suspend/resume support .../devicetree/bindings/arm/freescale/fsl,scu.txt | 12 +- .../devicetree/bindings/clock/imx8qxp-lpcg.txt | 36 +++- drivers/clk/imx/clk-imx8qxp-lpcg.c | 124 ++++++++++++ drivers/clk/imx/clk-imx8qxp.c | 9 +- drivers/clk/imx/clk-lpcg-scu.c | 45 ++++- drivers/clk/imx/clk-scu.c | 218 ++++++++++++++++++++- drivers/clk/imx/clk-scu.h | 50 ++++- include/dt-bindings/clock/imx8-lpcg.h | 14 ++ include/dt-bindings/firmware/imx/rsrc.h | 23 +++ 9 files changed, 501 insertions(+), 30 deletions(-) create mode 100644 include/dt-bindings/clock/imx8-lpcg.h