| Message ID | 1567090254-15566-23-git-send-email-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add drm support for MT8183 | expand |
Hi, Yongqiang: On Fri, 2019-08-30 at 13:58 +0800, CK Hu wrote: > Hi, Yongqiang: > > On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote: > > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > > > This patch add ovl0/ovl_2l0 usecase > > in ovl->ovl_2l0 direct link usecase: > > 1. the crtc support layer number will 4+2 > > 2. ovl_2l0 background color input select ovl0 when crtc init > > and disable it when crtc finish > > 3. config ovl_2l0 layer, if crtc config layer number is > > bigger than ovl0 support layers(max is 4) > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38 +++++++++++++++++++++++++++++++-- > > 1 file changed, 36 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > > index c63ff2b..b55970a 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > > @@ -270,6 +270,15 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > > > > for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { > > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i]; > > + enum mtk_ddp_comp_id prev; > > + > > + if (i > 0) > > + prev = mtk_crtc->ddp_comp[i - 1]->id; > > + else > > + prev = DDP_COMPONENT_ID_MAX; > > + > > + if (prev == DDP_COMPONENT_OVL0) > > + mtk_ddp_comp_bgclr_in_on(comp); > > Even though both OVL and OVL_2L implement this function, I think we > could still call this function for OVL and OVL_2L, and in > mtk_ovl_bgclr_in_on(), to judge it's OVL or OVL_2L. As internal discussion, you mention that OVL and OVL_2L both has bgclr_in function, so I think we should keep bgclr_in function for both OVL and OVL_2L. And in crtc, always enable bgclr_in for comp[1], so code here could be if (i == 1) mtk_ddp_comp_bgclr_in_on(comp); Regards, CK > > Regards, > CK > > > > > mtk_ddp_comp_config(comp, width, height, vrefresh, bpc); > > mtk_ddp_comp_start(comp); > > @@ -279,9 +288,18 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > > for (i = 0; i < mtk_crtc->layer_nr; i++) { > > struct drm_plane *plane = &mtk_crtc->planes[i]; > > struct mtk_plane_state *plane_state; > > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > > + unsigned int local_layer; > > > > plane_state = to_mtk_plane_state(plane->state); > > - mtk_ddp_comp_layer_config(mtk_crtc->ddp_comp[0], i, > > + > > + if (i >= comp_layer_nr) { > > + comp = mtk_crtc->ddp_comp[1]; > > + local_layer = i - comp_layer_nr; > > + } else > > + local_layer = i; > > + mtk_ddp_comp_layer_config(comp, local_layer, > > plane_state); > > } > > > > @@ -307,6 +325,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) > > mtk_crtc->ddp_comp[i]->id); > > mtk_disp_mutex_disable(mtk_crtc->mutex); > > for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { > > + mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]); > > mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs, > > mtk_crtc->mmsys_reg_data, > > mtk_crtc->ddp_comp[i]->id, > > @@ -327,6 +346,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > > struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); > > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > > unsigned int i; > > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > > + unsigned int local_layer; > > > > /* > > * TODO: instead of updating the registers here, we should prepare > > @@ -349,7 +370,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > > plane_state = to_mtk_plane_state(plane->state); > > > > if (plane_state->pending.config) { > > - mtk_ddp_comp_layer_config(comp, i, plane_state); > > + if (i >= comp_layer_nr) { > > + comp = mtk_crtc->ddp_comp[1]; > > + local_layer = i - comp_layer_nr; > > + } else > > + local_layer = i; > > + > > + mtk_ddp_comp_layer_config(comp, local_layer, > > + plane_state); > > plane_state->pending.config = false; > > } > > } > > @@ -572,6 +600,12 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, > > } > > > > mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]); > > + if (mtk_crtc->ddp_comp_nr > 1) { > > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[1]; > > + > > + if (comp->funcs->bgclr_in_on) > > + mtk_crtc->layer_nr += mtk_ddp_comp_layer_nr(comp); > > + } > > mtk_crtc->planes = devm_kcalloc(dev, mtk_crtc->layer_nr, > > sizeof(struct drm_plane), > > GFP_KERNEL); >
Hi, Yongqiang: On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > This patch add ovl0/ovl_2l0 usecase > in ovl->ovl_2l0 direct link usecase: > 1. the crtc support layer number will 4+2 > 2. ovl_2l0 background color input select ovl0 when crtc init > and disable it when crtc finish > 3. config ovl_2l0 layer, if crtc config layer number is > bigger than ovl0 support layers(max is 4) > Applied to mediatek-drm-next-5.5 [1] with some modification by my comment, thanks. [1] https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-next-5.5 Regards, CK > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38 +++++++++++++++++++++++++++++++-- > 1 file changed, 36 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > index c63ff2b..b55970a 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > @@ -270,6 +270,15 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > > for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i]; > + enum mtk_ddp_comp_id prev; > + > + if (i > 0) > + prev = mtk_crtc->ddp_comp[i - 1]->id; > + else > + prev = DDP_COMPONENT_ID_MAX; > + > + if (prev == DDP_COMPONENT_OVL0) > + mtk_ddp_comp_bgclr_in_on(comp); > > mtk_ddp_comp_config(comp, width, height, vrefresh, bpc); > mtk_ddp_comp_start(comp); > @@ -279,9 +288,18 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > for (i = 0; i < mtk_crtc->layer_nr; i++) { > struct drm_plane *plane = &mtk_crtc->planes[i]; > struct mtk_plane_state *plane_state; > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > + unsigned int local_layer; > > plane_state = to_mtk_plane_state(plane->state); > - mtk_ddp_comp_layer_config(mtk_crtc->ddp_comp[0], i, > + > + if (i >= comp_layer_nr) { > + comp = mtk_crtc->ddp_comp[1]; > + local_layer = i - comp_layer_nr; > + } else > + local_layer = i; > + mtk_ddp_comp_layer_config(comp, local_layer, > plane_state); > } > > @@ -307,6 +325,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) > mtk_crtc->ddp_comp[i]->id); > mtk_disp_mutex_disable(mtk_crtc->mutex); > for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { > + mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]); > mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs, > mtk_crtc->mmsys_reg_data, > mtk_crtc->ddp_comp[i]->id, > @@ -327,6 +346,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > unsigned int i; > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > + unsigned int local_layer; > > /* > * TODO: instead of updating the registers here, we should prepare > @@ -349,7 +370,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > plane_state = to_mtk_plane_state(plane->state); > > if (plane_state->pending.config) { > - mtk_ddp_comp_layer_config(comp, i, plane_state); > + if (i >= comp_layer_nr) { > + comp = mtk_crtc->ddp_comp[1]; > + local_layer = i - comp_layer_nr; > + } else > + local_layer = i; > + > + mtk_ddp_comp_layer_config(comp, local_layer, > + plane_state); > plane_state->pending.config = false; > } > } > @@ -572,6 +600,12 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, > } > > mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]); > + if (mtk_crtc->ddp_comp_nr > 1) { > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[1]; > + > + if (comp->funcs->bgclr_in_on) > + mtk_crtc->layer_nr += mtk_ddp_comp_layer_nr(comp); > + } > mtk_crtc->planes = devm_kcalloc(dev, mtk_crtc->layer_nr, > sizeof(struct drm_plane), > GFP_KERNEL);
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index c63ff2b..b55970a 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -270,6 +270,15 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i]; + enum mtk_ddp_comp_id prev; + + if (i > 0) + prev = mtk_crtc->ddp_comp[i - 1]->id; + else + prev = DDP_COMPONENT_ID_MAX; + + if (prev == DDP_COMPONENT_OVL0) + mtk_ddp_comp_bgclr_in_on(comp); mtk_ddp_comp_config(comp, width, height, vrefresh, bpc); mtk_ddp_comp_start(comp); @@ -279,9 +288,18 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) for (i = 0; i < mtk_crtc->layer_nr; i++) { struct drm_plane *plane = &mtk_crtc->planes[i]; struct mtk_plane_state *plane_state; + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); + unsigned int local_layer; plane_state = to_mtk_plane_state(plane->state); - mtk_ddp_comp_layer_config(mtk_crtc->ddp_comp[0], i, + + if (i >= comp_layer_nr) { + comp = mtk_crtc->ddp_comp[1]; + local_layer = i - comp_layer_nr; + } else + local_layer = i; + mtk_ddp_comp_layer_config(comp, local_layer, plane_state); } @@ -307,6 +325,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) mtk_crtc->ddp_comp[i]->id); mtk_disp_mutex_disable(mtk_crtc->mutex); for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { + mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]); mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs, mtk_crtc->mmsys_reg_data, mtk_crtc->ddp_comp[i]->id, @@ -327,6 +346,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; unsigned int i; + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); + unsigned int local_layer; /* * TODO: instead of updating the registers here, we should prepare @@ -349,7 +370,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) plane_state = to_mtk_plane_state(plane->state); if (plane_state->pending.config) { - mtk_ddp_comp_layer_config(comp, i, plane_state); + if (i >= comp_layer_nr) { + comp = mtk_crtc->ddp_comp[1]; + local_layer = i - comp_layer_nr; + } else + local_layer = i; + + mtk_ddp_comp_layer_config(comp, local_layer, + plane_state); plane_state->pending.config = false; } } @@ -572,6 +600,12 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, } mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]); + if (mtk_crtc->ddp_comp_nr > 1) { + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[1]; + + if (comp->funcs->bgclr_in_on) + mtk_crtc->layer_nr += mtk_ddp_comp_layer_nr(comp); + } mtk_crtc->planes = devm_kcalloc(dev, mtk_crtc->layer_nr, sizeof(struct drm_plane), GFP_KERNEL);