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[0/2] TM field check failed

Message ID cover.1570498233.git.qi1.zhang@intel.com (mailing list archive)
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Series TM field check failed | expand

Message

Zhang, Qi1 Oct. 8, 2019, 1:39 a.m. UTC
From: "Zhang, Qi" <qi1.zhang@intel.com>

*** BLURB HERE ***

Zhang, Qi (2):
  intel_iommu: split the resevred fields arrays into two ones
  intel_iommu: TM field should not be in reserved bits

 hw/i386/intel_iommu.c          | 35 ++++++++++++++++++++--------------
 hw/i386/intel_iommu_internal.h | 17 +++++++++++++----
 2 files changed, 34 insertions(+), 18 deletions(-)

Comments

Zhang, Qi1 Oct. 12, 2019, 5:05 a.m. UTC | #1
Hello, everyone

May I know you have comments on this patch set? Thank you!

BRs
Qi Zhang
> -----Original Message-----
> From: Zhang, Qi1 <qi1.zhang@intel.com>
> Sent: Tuesday, October 8, 2019 10:35 AM
> To: qemu-devel@nongnu.org
> Cc: mst@redhat.com; marcel.apfelbaum@gmail.com; pbonzini@redhat.com;
> rth@twiddle.net; ehabkost@redhat.com; Zhang, Qi1 <qi1.zhang@intel.com>;
> Qi, Yadong <yadong.qi@intel.com>
> Subject: [PATCH v1 0/2] TM field check failed
> 
> From: "Zhang, Qi" <qi1.zhang@intel.com>
> 
> spilt the reserved fields arrays and remove TM field from reserved bits
> 
> Changelog V1:
>   add descriptons
> 
> Zhang, Qi (2):
>   intel_iommu: split the resevred fields arrays into two ones
>   intel_iommu: TM field should not be in reserved bits
> 
>  hw/i386/intel_iommu.c          | 35 ++++++++++++++++++++--------------
>  hw/i386/intel_iommu_internal.h | 17 +++++++++++++----
>  2 files changed, 34 insertions(+), 18 deletions(-)
> 
> --
> 2.20.1