@@ -60,7 +60,7 @@
#endif
#define ATOMIC_TRACE_RMW do { \
- uint8_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false); \
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, ATOMIC_MMU_IDX); \
\
trace_guest_mem_before_exec(env_cpu(env), addr, info); \
trace_guest_mem_before_exec(env_cpu(env), addr, \
@@ -68,13 +68,13 @@
} while (0)
#define ATOMIC_TRACE_LD do { \
- uint8_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false); \
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, ATOMIC_MMU_IDX); \
\
trace_guest_mem_before_exec(env_cpu(env), addr, info); \
} while (0)
# define ATOMIC_TRACE_ST do { \
- uint8_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, true); \
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, true, ATOMIC_MMU_IDX); \
\
trace_guest_mem_before_exec(env_cpu(env), addr, info); \
} while (0)
@@ -1811,6 +1811,7 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
#define ATOMIC_MMU_DECLS
#define ATOMIC_MMU_LOOKUP atomic_mmu_lookup(env, addr, oi, retaddr)
#define ATOMIC_MMU_CLEANUP
+#define ATOMIC_MMU_IDX oi
#define DATA_SIZE 1
#include "atomic_template.h"
@@ -1853,6 +1854,7 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
#define DATA_SIZE 8
#include "atomic_template.h"
#endif
+#undef ATOMIC_MMU_IDX
/* Code access functions. */
@@ -751,6 +751,7 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
#define ATOMIC_MMU_DECLS do {} while (0)
#define ATOMIC_MMU_LOOKUP atomic_mmu_lookup(env, addr, DATA_SIZE, GETPC())
#define ATOMIC_MMU_CLEANUP do { clear_helper_retaddr(); } while (0)
+#define ATOMIC_MMU_IDX 0
#define ATOMIC_NAME(X) HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
#define EXTRA_ARGS
@@ -84,17 +84,16 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
CPUTLBEntry *entry;
RES_TYPE res;
target_ulong addr;
- int mmu_idx;
+ int mmu_idx = CPU_MMU_INDEX;
TCGMemOpIdx oi;
#if !defined(SOFTMMU_CODE_ACCESS)
trace_guest_mem_before_exec(
env_cpu(env), ptr,
- trace_mem_build_info(SHIFT, false, MO_TE, false));
+ trace_mem_build_info(SHIFT, false, MO_TE, false, mmu_idx));
#endif
addr = ptr;
- mmu_idx = CPU_MMU_INDEX;
entry = tlb_entry(env, mmu_idx, addr);
if (unlikely(entry->ADDR_READ !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
@@ -123,17 +122,16 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
CPUTLBEntry *entry;
int res;
target_ulong addr;
- int mmu_idx;
+ int mmu_idx = CPU_MMU_INDEX;
TCGMemOpIdx oi;
#if !defined(SOFTMMU_CODE_ACCESS)
trace_guest_mem_before_exec(
env_cpu(env), ptr,
- trace_mem_build_info(SHIFT, true, MO_TE, false));
+ trace_mem_build_info(SHIFT, true, MO_TE, false, mmu_idx));
#endif
addr = ptr;
- mmu_idx = CPU_MMU_INDEX;
entry = tlb_entry(env, mmu_idx, addr);
if (unlikely(entry->ADDR_READ !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
@@ -165,17 +163,16 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
{
CPUTLBEntry *entry;
target_ulong addr;
- int mmu_idx;
+ int mmu_idx = CPU_MMU_INDEX;
TCGMemOpIdx oi;
#if !defined(SOFTMMU_CODE_ACCESS)
trace_guest_mem_before_exec(
env_cpu(env), ptr,
- trace_mem_build_info(SHIFT, false, MO_TE, true));
+ trace_mem_build_info(SHIFT, false, MO_TE, true, mmu_idx));
#endif
addr = ptr;
- mmu_idx = CPU_MMU_INDEX;
entry = tlb_entry(env, mmu_idx, addr);
if (unlikely(tlb_addr_write(entry) !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
@@ -73,7 +73,7 @@ glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr)
#else
trace_guest_mem_before_exec(
env_cpu(env), ptr,
- trace_mem_build_info(SHIFT, false, MO_TE, false));
+ trace_mem_build_info(SHIFT, false, MO_TE, false, 0));
return glue(glue(ld, USUFFIX), _p)(g2h(ptr));
#endif
}
@@ -105,7 +105,7 @@ glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr)
#else
trace_guest_mem_before_exec(
env_cpu(env), ptr,
- trace_mem_build_info(SHIFT, true, MO_TE, false));
+ trace_mem_build_info(SHIFT, true, MO_TE, false, 0));
return glue(glue(lds, SUFFIX), _p)(g2h(ptr));
#endif
}
@@ -132,7 +132,7 @@ glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr,
{
trace_guest_mem_before_exec(
env_cpu(env), ptr,
- trace_mem_build_info(SHIFT, false, MO_TE, true));
+ trace_mem_build_info(SHIFT, false, MO_TE, true, 0));
glue(glue(st, SUFFIX), _p)(g2h(ptr), v);
}
@@ -83,6 +83,7 @@ TCG_2_HOST = {
HOST_2_TCG_COMPAT = {
"uint8_t": "uint32_t",
+ "uint16_t": "uint32_t",
}
@@ -2795,7 +2795,7 @@ void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
memop = tcg_canonicalize_memop(memop, 0, 0);
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
- addr, trace_mem_get_info(memop, 0));
+ addr, trace_mem_get_info(memop, idx, 0));
orig_memop = memop;
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
@@ -2832,7 +2832,7 @@ void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
memop = tcg_canonicalize_memop(memop, 0, 1);
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
- addr, trace_mem_get_info(memop, 1));
+ addr, trace_mem_get_info(memop, idx, 1));
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
swap = tcg_temp_new_i32();
@@ -2875,7 +2875,7 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
memop = tcg_canonicalize_memop(memop, 1, 0);
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
- addr, trace_mem_get_info(memop, 0));
+ addr, trace_mem_get_info(memop, idx, 0));
orig_memop = memop;
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
@@ -2923,7 +2923,7 @@ void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
memop = tcg_canonicalize_memop(memop, 1, 1);
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
- addr, trace_mem_get_info(memop, 1));
+ addr, trace_mem_get_info(memop, idx, 1));
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
swap = tcg_temp_new_i64();
@@ -152,12 +152,14 @@ vcpu guest_cpu_reset(void)
# uint8_t size_shift : 4; /* interpreted as "1 << size_shift" bytes */
# bool sign_extend: 1; /* sign-extended */
# uint8_t endianness : 1; /* 0: little, 1: big */
-# bool store : 1; /* wheter it's a store operation */
+# bool store : 1; /* whether it is a store operation */
+# pad : 1;
+# uint8_t mmuidx : 4; /* mmuidx (softmmu only) */
# };
#
# Mode: user, softmmu
# Targets: TCG(all)
-vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"
+vcpu tcg guest_mem_before(TCGv vaddr, uint16_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"
# linux-user/syscall.c
# bsd-user/syscall.c
@@ -14,11 +14,13 @@
#define TRACE_MEM_SE (1ULL << 4) /* sign extended (y/n) */
#define TRACE_MEM_BE (1ULL << 5) /* big endian (y/n) */
#define TRACE_MEM_ST (1ULL << 6) /* store (y/n) */
+#define TRACE_MEM_MMU_SHIFT 8 /* mmu idx */
-static inline uint8_t trace_mem_build_info(
- int size_shift, bool sign_extend, MemOp endianness, bool store)
+static inline uint16_t trace_mem_build_info(
+ int size_shift, bool sign_extend, MemOp endianness,
+ bool store, unsigned int mmu_idx)
{
- uint8_t res;
+ uint16_t res;
res = size_shift & TRACE_MEM_SZ_SHIFT_MASK;
if (sign_extend) {
@@ -30,25 +32,36 @@ static inline uint8_t trace_mem_build_info(
if (store) {
res |= TRACE_MEM_ST;
}
+#ifdef CONFIG_SOFTMMU
+ res |= mmu_idx << TRACE_MEM_MMU_SHIFT;
+#endif
return res;
}
-static inline uint8_t trace_mem_get_info(MemOp op, bool store)
+static inline uint16_t trace_mem_get_info(MemOp op,
+ unsigned int mmu_idx,
+ bool store)
{
return trace_mem_build_info(op & MO_SIZE, !!(op & MO_SIGN),
- op & MO_BSWAP, store);
+ op & MO_BSWAP, store,
+ mmu_idx);
}
+/* Used by the atomic helpers */
static inline
-uint8_t trace_mem_build_info_no_se_be(int size_shift, bool store)
+uint16_t trace_mem_build_info_no_se_be(int size_shift, bool store,
+ TCGMemOpIdx oi)
{
- return trace_mem_build_info(size_shift, false, MO_BE, store);
+ return trace_mem_build_info(size_shift, false, MO_BE, store,
+ get_mmuidx(oi));
}
static inline
-uint8_t trace_mem_build_info_no_se_le(int size_shift, bool store)
+uint16_t trace_mem_build_info_no_se_le(int size_shift, bool store,
+ TCGMemOpIdx oi)
{
- return trace_mem_build_info(size_shift, false, MO_LE, store);
+ return trace_mem_build_info(size_shift, false, MO_LE, store,
+ get_mmuidx(oi));
}
#endif /* TRACE__MEM_INTERNAL_H */
@@ -18,15 +18,16 @@
*
* Return a value for the 'info' argument in guest memory access traces.
*/
-static uint8_t trace_mem_get_info(MemOp op, bool store);
+static uint16_t trace_mem_get_info(MemOp op, unsigned int mmu_idx, bool store);
/**
* trace_mem_build_info:
*
* Return a value for the 'info' argument in guest memory access traces.
*/
-static uint8_t trace_mem_build_info(int size_shift, bool sign_extend,
- MemOp endianness, bool store);
+static uint16_t trace_mem_build_info(int size_shift, bool sign_extend,
+ MemOp endianness, bool store,
+ unsigned int mmuidx);
#include "trace/mem-internal.h"
We are going to re-use mem_info later for plugins and will need to track the mmu_idx for softmmu code. [TODO: convert everything to use TCGMemOpIdx?] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- v5 - fix up shifts --- accel/tcg/atomic_template.h | 6 ++--- accel/tcg/cputlb.c | 2 ++ accel/tcg/user-exec.c | 1 + include/exec/cpu_ldst_template.h | 15 +++++------ include/exec/cpu_ldst_useronly_template.h | 6 ++--- scripts/tracetool/transform.py | 1 + tcg/tcg-op.c | 8 +++--- trace-events | 6 +++-- trace/mem-internal.h | 31 ++++++++++++++++------- trace/mem.h | 7 ++--- 10 files changed, 50 insertions(+), 33 deletions(-)