| Message ID | 20191031013040.25803-2-daniele.ceraolospurio@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] drm/i915: drop lrc header page | expand |
Quoting Daniele Ceraolo Spurio (2019-10-31 01:30:40) > Recent GuC doesn't require the shared area. We still have one user in > i915 (engine reset via guc) because we haven't updated the command to > match the current guc submission flow [1]. Since the flow in guc is > about to change again, just disable the command for now and add a note > that we'll implement it as part of the new flow. > > [1] https://patchwork.freedesktop.org/patch/295038/ > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: John Harrison <John.C.Harrison@Intel.com> > Cc: Matthew Brost <matthew.brost@intel.com> > Cc: Fernando Pacheco <fernando.pacheco@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
On Wed, Oct 30, 2019 at 06:30:40PM -0700, Daniele Ceraolo Spurio wrote: >Recent GuC doesn't require the shared area. We still have one user in >i915 (engine reset via guc) because we haven't updated the command to >match the current guc submission flow [1]. Since the flow in guc is >about to change again, just disable the command for now and add a note >that we'll implement it as part of the new flow. > >[1] https://patchwork.freedesktop.org/patch/295038/ > >Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >Cc: John Harrison <John.C.Harrison@Intel.com> >Cc: Matthew Brost <matthew.brost@intel.com> >Cc: Fernando Pacheco <fernando.pacheco@intel.com> >--- > drivers/gpu/drm/i915/gt/uc/intel_guc.c | 50 ++------------------------ > drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 -- > 2 files changed, 3 insertions(+), 49 deletions(-) > This patch also works with the GuC redesign work being done. Reviewed-by: Matthew Brost <matthew.brost@intel.com>
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index f12959182182..019ae6486e8d 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -192,32 +192,6 @@ void intel_guc_init_early(struct intel_guc *guc) } } -static int guc_shared_data_create(struct intel_guc *guc) -{ - struct i915_vma *vma; - void *vaddr; - - vma = intel_guc_allocate_vma(guc, PAGE_SIZE); - if (IS_ERR(vma)) - return PTR_ERR(vma); - - vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB); - if (IS_ERR(vaddr)) { - i915_vma_unpin_and_release(&vma, 0); - return PTR_ERR(vaddr); - } - - guc->shared_data = vma; - guc->shared_data_vaddr = vaddr; - - return 0; -} - -static void guc_shared_data_destroy(struct intel_guc *guc) -{ - i915_vma_unpin_and_release(&guc->shared_data, I915_VMA_RELEASE_MAP); -} - static u32 guc_ctl_debug_flags(struct intel_guc *guc) { u32 level = intel_guc_log_get_level(&guc->log); @@ -364,14 +338,9 @@ int intel_guc_init(struct intel_guc *guc) if (ret) goto err_fetch; - ret = guc_shared_data_create(guc); - if (ret) - goto err_fw; - GEM_BUG_ON(!guc->shared_data); - ret = intel_guc_log_create(&guc->log); if (ret) - goto err_shared; + goto err_fw; ret = intel_guc_ads_create(guc); if (ret) @@ -406,8 +375,6 @@ int intel_guc_init(struct intel_guc *guc) intel_guc_ads_destroy(guc); err_log: intel_guc_log_destroy(&guc->log); -err_shared: - guc_shared_data_destroy(guc); err_fw: intel_uc_fw_fini(&guc->fw); err_fetch: @@ -432,7 +399,6 @@ void intel_guc_fini(struct intel_guc *guc) intel_guc_ads_destroy(guc); intel_guc_log_destroy(&guc->log); - guc_shared_data_destroy(guc); intel_uc_fw_fini(&guc->fw); intel_uc_fw_cleanup_fetch(&guc->fw); } @@ -628,19 +594,9 @@ int intel_guc_suspend(struct intel_guc *guc) int intel_guc_reset_engine(struct intel_guc *guc, struct intel_engine_cs *engine) { - u32 data[7]; - - GEM_BUG_ON(!guc->execbuf_client); + /* XXX: to be implemented with submission interface rework */ - data[0] = INTEL_GUC_ACTION_REQUEST_ENGINE_RESET; - data[1] = engine->guc_id; - data[2] = 0; - data[3] = 0; - data[4] = 0; - data[5] = guc->execbuf_client->stage_id; - data[6] = intel_guc_ggtt_offset(guc, guc->shared_data); - - return intel_guc_send(guc, data, ARRAY_SIZE(data)); + return -ENODEV; } /** diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h index 2b2f046d3cc3..e6400204a2bd 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h @@ -47,8 +47,6 @@ struct intel_guc { struct i915_vma *stage_desc_pool; void *stage_desc_pool_vaddr; struct ida stage_ids; - struct i915_vma *shared_data; - void *shared_data_vaddr; struct intel_guc_client *execbuf_client;
Recent GuC doesn't require the shared area. We still have one user in i915 (engine reset via guc) because we haven't updated the command to match the current guc submission flow [1]. Since the flow in guc is about to change again, just disable the command for now and add a note that we'll implement it as part of the new flow. [1] https://patchwork.freedesktop.org/patch/295038/ Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Fernando Pacheco <fernando.pacheco@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc.c | 50 ++------------------------ drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 -- 2 files changed, 3 insertions(+), 49 deletions(-)