diff mbox series

firmware: ti_sci: rm: Add support for tx_tdtype parameter for tx channel

Message ID 20191025084715.25098-1-peter.ujfalusi@ti.com (mailing list archive)
State New, archived
Headers show
Series firmware: ti_sci: rm: Add support for tx_tdtype parameter for tx channel | expand

Commit Message

Peter Ujfalusi Oct. 25, 2019, 8:47 a.m. UTC
The system controller's resource manager have support for configuring the
TDTYPE of TCHAN_CFG register on j721e.
With this parameter the teardown completion can be controlled:
TDTYPE == 0: Return without waiting for peer to complete the teardown
TDTYPE == 1: Wait for peer to complete the teardown

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
Hi,

I know it is kind of getting late for 5.5, but can you consider this small
addition so I can add the support for it in the initial DMA driver?

Thanks and regards,
Peter

 drivers/firmware/ti_sci.c              | 1 +
 drivers/firmware/ti_sci.h              | 7 +++++++
 include/linux/soc/ti/ti_sci_protocol.h | 2 ++
 3 files changed, 10 insertions(+)

Comments

Tero Kristo Nov. 1, 2019, 8:23 a.m. UTC | #1
On 25/10/2019 11:47, Peter Ujfalusi wrote:
> The system controller's resource manager have support for configuring the
> TDTYPE of TCHAN_CFG register on j721e.
> With this parameter the teardown completion can be controlled:
> TDTYPE == 0: Return without waiting for peer to complete the teardown
> TDTYPE == 1: Wait for peer to complete the teardown
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>

Reviewed-by: Tero Kristo <t-kristo@ti.com>

> ---
> Hi,
> 
> I know it is kind of getting late for 5.5, but can you consider this small
> addition so I can add the support for it in the initial DMA driver?
> 
> Thanks and regards,
> Peter
> 
>   drivers/firmware/ti_sci.c              | 1 +
>   drivers/firmware/ti_sci.h              | 7 +++++++
>   include/linux/soc/ti/ti_sci_protocol.h | 2 ++
>   3 files changed, 10 insertions(+)
> 
> diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
> index 4126be9e3216..f13e4a96f3b7 100644
> --- a/drivers/firmware/ti_sci.c
> +++ b/drivers/firmware/ti_sci.c
> @@ -2412,6 +2412,7 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg(const struct ti_sci_handle *handle,
>   	req->fdepth = params->fdepth;
>   	req->tx_sched_priority = params->tx_sched_priority;
>   	req->tx_burst_size = params->tx_burst_size;
> +	req->tx_tdtype = params->tx_tdtype;
>   
>   	ret = ti_sci_do_xfer(info, xfer);
>   	if (ret) {
> diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
> index f0d068c03944..255327171dae 100644
> --- a/drivers/firmware/ti_sci.h
> +++ b/drivers/firmware/ti_sci.h
> @@ -910,6 +910,7 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
>    *   12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
>    *   13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
>    *   14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
> + *   15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype
>    *
>    * @nav_id: SoC device ID of Navigator Subsystem where tx channel is located
>    *
> @@ -973,6 +974,11 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
>    *
>    * @tx_burst_size: UDMAP transmit channel burst size configuration to be
>    * programmed into the tx_burst_size field of the TCHAN_TCFG register.
> + *
> + * @tx_tdtype: UDMAP transmit channel teardown type configuration to be
> + * programmed into the tdtype field of the TCHAN_TCFG register:
> + * 0 - Return immediately
> + * 1 - Wait for completion message from remote peer
>    */
>   struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
>   	struct ti_sci_msg_hdr hdr;
> @@ -994,6 +1000,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
>   	u16 fdepth;
>   	u8 tx_sched_priority;
>   	u8 tx_burst_size;
> +	u8 tx_tdtype;
>   } __packed;
>   
>   /**
> diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h
> index 9531ec823298..f3aed0b91564 100644
> --- a/include/linux/soc/ti/ti_sci_protocol.h
> +++ b/include/linux/soc/ti/ti_sci_protocol.h
> @@ -342,6 +342,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID        BIT(11)
>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID      BIT(12)
>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID            BIT(13)
> +#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID            BIT(15)
>   	u16 nav_id;
>   	u16 index;
>   	u8 tx_pause_on_err;
> @@ -359,6 +360,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
>   	u16 fdepth;
>   	u8 tx_sched_priority;
>   	u8 tx_burst_size;
> +	u8 tx_tdtype;
>   };
>   
>   /**
> 

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Peter Ujfalusi Nov. 13, 2019, 6:48 a.m. UTC | #2
Thanks Tero,

On 01/11/2019 10.23, Tero Kristo wrote:
> On 25/10/2019 11:47, Peter Ujfalusi wrote:
>> The system controller's resource manager have support for configuring the
>> TDTYPE of TCHAN_CFG register on j721e.
>> With this parameter the teardown completion can be controlled:
>> TDTYPE == 0: Return without waiting for peer to complete the teardown
>> TDTYPE == 1: Wait for peer to complete the teardown
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> 
> Reviewed-by: Tero Kristo <t-kristo@ti.com>

I'll take this patch as part of the upcoming v6 of the k3 DMA support
series to make sure it is buildable unless someone will pick this for
5.5-rc1.

- Péter

> 
>> ---
>> Hi,
>>
>> I know it is kind of getting late for 5.5, but can you consider this
>> small
>> addition so I can add the support for it in the initial DMA driver?
>>
>> Thanks and regards,
>> Peter
>>
>>   drivers/firmware/ti_sci.c              | 1 +
>>   drivers/firmware/ti_sci.h              | 7 +++++++
>>   include/linux/soc/ti/ti_sci_protocol.h | 2 ++
>>   3 files changed, 10 insertions(+)
>>
>> diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
>> index 4126be9e3216..f13e4a96f3b7 100644
>> --- a/drivers/firmware/ti_sci.c
>> +++ b/drivers/firmware/ti_sci.c
>> @@ -2412,6 +2412,7 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg(const
>> struct ti_sci_handle *handle,
>>       req->fdepth = params->fdepth;
>>       req->tx_sched_priority = params->tx_sched_priority;
>>       req->tx_burst_size = params->tx_burst_size;
>> +    req->tx_tdtype = params->tx_tdtype;
>>         ret = ti_sci_do_xfer(info, xfer);
>>       if (ret) {
>> diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
>> index f0d068c03944..255327171dae 100644
>> --- a/drivers/firmware/ti_sci.h
>> +++ b/drivers/firmware/ti_sci.h
>> @@ -910,6 +910,7 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
>>    *   12 - Valid bit for @ref
>> ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
>>    *   13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
>>    *   14 - Valid bit for @ref
>> ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
>> + *   15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype
>>    *
>>    * @nav_id: SoC device ID of Navigator Subsystem where tx channel is
>> located
>>    *
>> @@ -973,6 +974,11 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
>>    *
>>    * @tx_burst_size: UDMAP transmit channel burst size configuration
>> to be
>>    * programmed into the tx_burst_size field of the TCHAN_TCFG register.
>> + *
>> + * @tx_tdtype: UDMAP transmit channel teardown type configuration to be
>> + * programmed into the tdtype field of the TCHAN_TCFG register:
>> + * 0 - Return immediately
>> + * 1 - Wait for completion message from remote peer
>>    */
>>   struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
>>       struct ti_sci_msg_hdr hdr;
>> @@ -994,6 +1000,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
>>       u16 fdepth;
>>       u8 tx_sched_priority;
>>       u8 tx_burst_size;
>> +    u8 tx_tdtype;
>>   } __packed;
>>     /**
>> diff --git a/include/linux/soc/ti/ti_sci_protocol.h
>> b/include/linux/soc/ti/ti_sci_protocol.h
>> index 9531ec823298..f3aed0b91564 100644
>> --- a/include/linux/soc/ti/ti_sci_protocol.h
>> +++ b/include/linux/soc/ti/ti_sci_protocol.h
>> @@ -342,6 +342,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
>>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID        BIT(11)
>>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID      BIT(12)
>>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID            BIT(13)
>> +#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID            BIT(15)
>>       u16 nav_id;
>>       u16 index;
>>       u8 tx_pause_on_err;
>> @@ -359,6 +360,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
>>       u16 fdepth;
>>       u8 tx_sched_priority;
>>       u8 tx_burst_size;
>> +    u8 tx_tdtype;
>>   };
>>     /**
>>
> 
> -- 
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Peter Ujfalusi Nov. 27, 2019, 7:57 a.m. UTC | #3
Hi,

On 13/11/2019 8.48, Peter Ujfalusi wrote:
> Thanks Tero,
> 
> On 01/11/2019 10.23, Tero Kristo wrote:
>> On 25/10/2019 11:47, Peter Ujfalusi wrote:
>>> The system controller's resource manager have support for configuring the
>>> TDTYPE of TCHAN_CFG register on j721e.
>>> With this parameter the teardown completion can be controlled:
>>> TDTYPE == 0: Return without waiting for peer to complete the teardown
>>> TDTYPE == 1: Wait for peer to complete the teardown
>>>
>>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>>
>> Reviewed-by: Tero Kristo <t-kristo@ti.com>
> 
> I'll take this patch as part of the upcoming v6 of the k3 DMA support
> series to make sure it is buildable unless someone will pick this for
> 5.5-rc1.

Will this patch going to be picked up for 5.5?

If not, then I'll just split out the support for this in the upcoming
DMA driver and let Vinod decide if he wants to apply firmware patch
along with the DMA driver.
Or just plan to get the support for this in 5.7.

- Péter

> 
> - Péter
> 
>>
>>> ---
>>> Hi,
>>>
>>> I know it is kind of getting late for 5.5, but can you consider this
>>> small
>>> addition so I can add the support for it in the initial DMA driver?
>>>
>>> Thanks and regards,
>>> Peter
>>>
>>>   drivers/firmware/ti_sci.c              | 1 +
>>>   drivers/firmware/ti_sci.h              | 7 +++++++
>>>   include/linux/soc/ti/ti_sci_protocol.h | 2 ++
>>>   3 files changed, 10 insertions(+)
>>>
>>> diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
>>> index 4126be9e3216..f13e4a96f3b7 100644
>>> --- a/drivers/firmware/ti_sci.c
>>> +++ b/drivers/firmware/ti_sci.c
>>> @@ -2412,6 +2412,7 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg(const
>>> struct ti_sci_handle *handle,
>>>       req->fdepth = params->fdepth;
>>>       req->tx_sched_priority = params->tx_sched_priority;
>>>       req->tx_burst_size = params->tx_burst_size;
>>> +    req->tx_tdtype = params->tx_tdtype;
>>>         ret = ti_sci_do_xfer(info, xfer);
>>>       if (ret) {
>>> diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
>>> index f0d068c03944..255327171dae 100644
>>> --- a/drivers/firmware/ti_sci.h
>>> +++ b/drivers/firmware/ti_sci.h
>>> @@ -910,6 +910,7 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
>>>    *   12 - Valid bit for @ref
>>> ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
>>>    *   13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
>>>    *   14 - Valid bit for @ref
>>> ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
>>> + *   15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype
>>>    *
>>>    * @nav_id: SoC device ID of Navigator Subsystem where tx channel is
>>> located
>>>    *
>>> @@ -973,6 +974,11 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
>>>    *
>>>    * @tx_burst_size: UDMAP transmit channel burst size configuration
>>> to be
>>>    * programmed into the tx_burst_size field of the TCHAN_TCFG register.
>>> + *
>>> + * @tx_tdtype: UDMAP transmit channel teardown type configuration to be
>>> + * programmed into the tdtype field of the TCHAN_TCFG register:
>>> + * 0 - Return immediately
>>> + * 1 - Wait for completion message from remote peer
>>>    */
>>>   struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
>>>       struct ti_sci_msg_hdr hdr;
>>> @@ -994,6 +1000,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
>>>       u16 fdepth;
>>>       u8 tx_sched_priority;
>>>       u8 tx_burst_size;
>>> +    u8 tx_tdtype;
>>>   } __packed;
>>>     /**
>>> diff --git a/include/linux/soc/ti/ti_sci_protocol.h
>>> b/include/linux/soc/ti/ti_sci_protocol.h
>>> index 9531ec823298..f3aed0b91564 100644
>>> --- a/include/linux/soc/ti/ti_sci_protocol.h
>>> +++ b/include/linux/soc/ti/ti_sci_protocol.h
>>> @@ -342,6 +342,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
>>>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID        BIT(11)
>>>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID      BIT(12)
>>>   #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID            BIT(13)
>>> +#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID            BIT(15)
>>>       u16 nav_id;
>>>       u16 index;
>>>       u8 tx_pause_on_err;
>>> @@ -359,6 +360,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
>>>       u16 fdepth;
>>>       u8 tx_sched_priority;
>>>       u8 tx_burst_size;
>>> +    u8 tx_tdtype;
>>>   };
>>>     /**
>>>
>>
>> -- 
>> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
>> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
> 
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
diff mbox series

Patch

diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index 4126be9e3216..f13e4a96f3b7 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -2412,6 +2412,7 @@  static int ti_sci_cmd_rm_udmap_tx_ch_cfg(const struct ti_sci_handle *handle,
 	req->fdepth = params->fdepth;
 	req->tx_sched_priority = params->tx_sched_priority;
 	req->tx_burst_size = params->tx_burst_size;
+	req->tx_tdtype = params->tx_tdtype;
 
 	ret = ti_sci_do_xfer(info, xfer);
 	if (ret) {
diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
index f0d068c03944..255327171dae 100644
--- a/drivers/firmware/ti_sci.h
+++ b/drivers/firmware/ti_sci.h
@@ -910,6 +910,7 @@  struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
  *   12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
  *   13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
  *   14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
+ *   15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype
  *
  * @nav_id: SoC device ID of Navigator Subsystem where tx channel is located
  *
@@ -973,6 +974,11 @@  struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
  *
  * @tx_burst_size: UDMAP transmit channel burst size configuration to be
  * programmed into the tx_burst_size field of the TCHAN_TCFG register.
+ *
+ * @tx_tdtype: UDMAP transmit channel teardown type configuration to be
+ * programmed into the tdtype field of the TCHAN_TCFG register:
+ * 0 - Return immediately
+ * 1 - Wait for completion message from remote peer
  */
 struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
 	struct ti_sci_msg_hdr hdr;
@@ -994,6 +1000,7 @@  struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
 	u16 fdepth;
 	u8 tx_sched_priority;
 	u8 tx_burst_size;
+	u8 tx_tdtype;
 } __packed;
 
 /**
diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h
index 9531ec823298..f3aed0b91564 100644
--- a/include/linux/soc/ti/ti_sci_protocol.h
+++ b/include/linux/soc/ti/ti_sci_protocol.h
@@ -342,6 +342,7 @@  struct ti_sci_msg_rm_udmap_tx_ch_cfg {
 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID        BIT(11)
 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID      BIT(12)
 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID            BIT(13)
+#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID            BIT(15)
 	u16 nav_id;
 	u16 index;
 	u8 tx_pause_on_err;
@@ -359,6 +360,7 @@  struct ti_sci_msg_rm_udmap_tx_ch_cfg {
 	u16 fdepth;
 	u8 tx_sched_priority;
 	u8 tx_burst_size;
+	u8 tx_tdtype;
 };
 
 /**