diff mbox

[2/5,v4] arm: omap: usb: ehci and ohci hwmod structures for omap3

Message ID 1312899309-24067-3-git-send-email-keshava_mgowda@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Munegowda, Keshava Aug. 9, 2011, 2:15 p.m. UTC
Following 4 hwmod strcuture are added:
UHH hwmod of usbhs with uhh base address and functional clock,
EHCI hwmod with irq and base address,
OHCI hwmod with irq and base address,
TLL hwmod of usbhs with the TLL base address and irq.

Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |  279 ++++++++++++++++++++++++++++
 1 files changed, 279 insertions(+), 0 deletions(-)

Comments

Ming Lei Aug. 11, 2011, 3:23 p.m. UTC | #1
Hi,

On Tue, Aug 9, 2011 at 10:15 PM, Keshava Munegowda
<keshava_mgowda@ti.com> wrote:
> Following 4 hwmod strcuture are added:
> UHH hwmod of usbhs with uhh base address and functional clock,
> EHCI hwmod with irq and base address,
> OHCI hwmod with irq and base address,
> TLL hwmod of usbhs with the TLL base address and irq.
>
> Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
> ---
>  arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |  279 ++++++++++++++++++++++++++++
>  1 files changed, 279 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index 59fdb9f..d7316b3 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -84,6 +84,10 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
>  static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
>  static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
>  static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
> +static struct omap_hwmod omap34xx_usb_host_hs_hwmod;
> +static struct omap_hwmod omap34xx_usbhs_ohci_hwmod;
> +static struct omap_hwmod omap34xx_usbhs_ehci_hwmod;
> +static struct omap_hwmod omap34xx_usb_tll_hs_hwmod;
>
>  /* L3 -> L4_CORE interface */
>  static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
> @@ -3196,6 +3200,276 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
>        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
>  };
>
> +/*
> + * 'usb_host_hs' class
> + * high-speed multi-port usb host controller
> + */
> +static struct omap_hwmod_ocp_if omap34xx_usb_host_hs__l3_main_2 = {
> +       .master         = &omap34xx_usb_host_hs_hwmod,
> +       .slave          = &omap3xxx_l3_main_hwmod,
> +       .clk            = "core_l3_ick",
> +       .user           = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = {
> +       .rev_offs       = 0x0000,
> +       .sysc_offs      = 0x0010,
> +       .syss_offs      = 0x0014,
> +       .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),

SYSC_HAS_ENAWAKEUP is missed or not needed?

> +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> +                          MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> +       .sysc_fields    = &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = {
> +       .name = "usbhs_uhh",
> +       .sysc = &omap34xx_usb_host_hs_sysc,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = {
> +       &omap34xx_usb_host_hs__l3_main_2,
> +};
> +
> +static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = {
> +       {
> +               .name           = "uhh",
> +               .pa_start       = 0x48064000,
> +               .pa_end         = 0x480643ff,
> +               .flags          = ADDR_TYPE_RT
> +       },
> +       {} /* Terminating Entry */
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = {
> +       .master         = &omap3xxx_l4_core_hwmod,
> +       .slave          = &omap34xx_usb_host_hs_hwmod,
> +       .clk            = "l4_ick",
> +       .addr           = omap34xx_usb_host_hs_addrs,
> +       .user           = OCP_USER_MPU | OCP_USER_SDMA,
> +};

Even USBHOST_L4_ICLK is used only by USBHOST_SICLK, it is better to
define a "usbhost_siclk" clk for consistence with TRM.

> +
> +static struct omap_hwmod_ocp_if omap34xx_f128m_cfg__usb_host_hs = {
> +       .clk            = "usbhost_120m_fck",
> +       .user           = OCP_USER_MPU,
> +       .flags          = OCPIF_SWSUP_IDLE,
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_f48m_cfg__usb_host_hs = {
> +       .clk            = "usbhost_48m_fck",
> +       .user           = OCP_USER_MPU,
> +       .flags          = OCPIF_SWSUP_IDLE,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_slaves[] = {
> +       &omap34xx_l4_cfg__usb_host_hs,
> +       &omap34xx_f128m_cfg__usb_host_hs,
> +       &omap34xx_f48m_cfg__usb_host_hs,
> +};
> +
> +static struct omap_hwmod omap34xx_usb_host_hs_hwmod = {
> +       .name           = "usbhs_uhh",
> +       .class          = &omap34xx_usb_host_hs_hwmod_class,
> +       .main_clk       = "usbhost_ick",
> +       .prcm = {
> +               .omap2 = {
> +                       .module_offs = OMAP3430ES2_USBHOST_MOD,
> +                       .prcm_reg_id = 1,
> +                       .module_bit = 0,
> +                       .idlest_reg_id = 1,
> +                       .idlest_idle_bit = 1,
> +                       .idlest_stdby_bit = 0,
> +               },
> +       },
> +       .slaves         = omap34xx_usb_host_hs_slaves,
> +       .slaves_cnt     = ARRAY_SIZE(omap34xx_usb_host_hs_slaves),
> +       .masters        = omap34xx_usb_host_hs_masters,
> +       .masters_cnt    = ARRAY_SIZE(omap34xx_usb_host_hs_masters),
> +       .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
> +       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
> +/* 'usbhs_ohci' class  */
> +static struct omap_hwmod_ocp_if omap34xx_usbhs_ohci__l3_main_2 = {
> +       .master         = &omap34xx_usbhs_ohci_hwmod,
> +       .slave          = &omap3xxx_l3_main_hwmod,
> +       .clk            = "core_l3_ick",
> +       .user           = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_class omap34xx_usbhs_ohci_hwmod_class = {
> +       .name = "usbhs_ohci",
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usbhs_ohci_masters[] = {
> +       &omap34xx_usbhs_ohci__l3_main_2,
> +};
> +
> +static struct omap_hwmod_irq_info omap34xx_usbhs_ohci_irqs[] = {
> +       { .name = "ohci-irq", .irq = 76 },
> +       { .irq = -1 } /* Terminating IRQ */
> +};
> +
> +static struct omap_hwmod_addr_space omap34xx_usbhs_ohci_addrs[] = {
> +       {
> +               .name           = "ohci",
> +               .pa_start       = 0x48064400,
> +               .pa_end         = 0x480647FF,
> +               .flags          = ADDR_MAP_ON_INIT
> +       },
> +       {} /* Terminating Entry */
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usbhs_ohci = {
> +       .master         = &omap3xxx_l4_core_hwmod,
> +       .slave          = &omap34xx_usbhs_ohci_hwmod,
> +       .clk            = "l4_ick",
> +       .addr           = omap34xx_usbhs_ohci_addrs,
> +       .user           = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usbhs_ohci_slaves[] = {
> +       &omap34xx_l4_cfg__usbhs_ohci,
> +};
> +
> +static struct omap_hwmod omap34xx_usbhs_ohci_hwmod = {
> +       .name           = "usbhs_ohci",
> +       .class          = &omap34xx_usbhs_ohci_hwmod_class,
> +       .mpu_irqs       = omap34xx_usbhs_ohci_irqs,
> +       .slaves         = omap34xx_usbhs_ohci_slaves,
> +       .slaves_cnt     = ARRAY_SIZE(omap34xx_usbhs_ohci_slaves),
> +       .masters        = omap34xx_usbhs_ohci_masters,
> +       .masters_cnt    = ARRAY_SIZE(omap34xx_usbhs_ohci_masters),
> +       .flags          = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
> +       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
> +/* 'usbhs_ehci' class  */
> +static struct omap_hwmod_ocp_if omap34xx_usbhs_ehci__l3_main_2 = {
> +       .master         = &omap34xx_usbhs_ehci_hwmod,
> +       .slave          = &omap3xxx_l3_main_hwmod,
> +       .clk            = "core_l3_ick",
> +       .user           = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_class omap34xx_usbhs_ehci_hwmod_class = {
> +       .name = "usbhs_ehci",
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usbhs_ehci_masters[] = {
> +       &omap34xx_usbhs_ehci__l3_main_2,
> +};
> +
> +static struct omap_hwmod_irq_info omap34xx_usbhs_ehci_irqs[] = {
> +       { .name = "ehci-irq", .irq = 77 },
> +       { .irq = -1 } /* Terminating IRQ */
> +};
> +
> +static struct omap_hwmod_addr_space omap34xx_usbhs_ehci_addrs[] = {
> +       {
> +               .name           = "ehci",
> +               .pa_start       = 0x48064800,
> +               .pa_end         = 0x48064CFF,
> +               .flags          = ADDR_MAP_ON_INIT
> +       },
> +       {} /* Terminating Entry */
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usbhs_ehci = {
> +       .master         = &omap3xxx_l4_core_hwmod,
> +       .slave          = &omap34xx_usbhs_ehci_hwmod,
> +       .clk            = "l4_ick",
> +       .addr           = omap34xx_usbhs_ehci_addrs,
> +       .user           = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usbhs_ehci_slaves[] = {
> +       &omap34xx_l4_cfg__usbhs_ehci,
> +};
> +
> +static struct omap_hwmod omap34xx_usbhs_ehci_hwmod = {
> +       .name           = "usbhs_ehci",
> +       .class          = &omap34xx_usbhs_ehci_hwmod_class,
> +       .mpu_irqs       = omap34xx_usbhs_ehci_irqs,
> +       .slaves         = omap34xx_usbhs_ehci_slaves,
> +       .slaves_cnt     = ARRAY_SIZE(omap34xx_usbhs_ehci_slaves),
> +       .masters        = omap34xx_usbhs_ehci_masters,
> +       .masters_cnt    = ARRAY_SIZE(omap34xx_usbhs_ehci_masters),
> +       .flags          = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
> +       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
> +/*
> + * 'usb_tll_hs' class
> + * usb_tll_hs module is the adapter on the usb_host_hs ports
> + */
> +static struct omap_hwmod_class_sysconfig omap34xx_usb_tll_hs_sysc = {
> +       .rev_offs       = 0x0000,
> +       .sysc_offs      = 0x0010,
> +       .syss_offs      = 0x0014,
> +       .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE),
> +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> +       .sysc_fields    = &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap34xx_usb_tll_hs_hwmod_class = {
> +       .name = "usbhs_tll",
> +       .sysc = &omap34xx_usb_tll_hs_sysc,
> +};
> +
> +static struct omap_hwmod_irq_info omap34xx_usb_tll_hs_irqs[] = {
> +       { .name = "tll-irq", .irq = 78 },
> +       { .irq = -1 } /* Terminating IRQ */
> +};
> +
> +static struct omap_hwmod_addr_space omap34xx_usb_tll_hs_addrs[] = {
> +       {
> +               .name           = "tll",
> +               .pa_start       = 0x48062000,
> +               .pa_end         = 0x48062fff,
> +               .flags          = ADDR_TYPE_RT
> +       },
> +       {} /* Terminating Entry */
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_f_cfg__usb_tll_hs = {
> +       .clk            = "usbtll_fck",
> +       .user           = OCP_USER_MPU,
> +       .flags          = OCPIF_SWSUP_IDLE,
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_tll_hs = {
> +       .master         = &omap3xxx_l4_core_hwmod,
> +       .slave          = &omap34xx_usb_tll_hs_hwmod,
> +       .clk            = "l4_ick",
> +       .addr           = omap34xx_usb_tll_hs_addrs,
> +       .user           = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usb_tll_hs_slaves[] = {
> +       &omap34xx_l4_cfg__usb_tll_hs,
> +       &omap34xx_f_cfg__usb_tll_hs,
> +};
> +
> +static struct omap_hwmod omap34xx_usb_tll_hs_hwmod = {
> +       .name           = "usbhs_tll",
> +       .class          = &omap34xx_usb_tll_hs_hwmod_class,
> +       .mpu_irqs       = omap34xx_usb_tll_hs_irqs,
> +       .main_clk       = "usbtll_ick",
> +       .prcm = {
> +               .omap2 = {
> +                       .module_offs = CORE_MOD,
> +                       .prcm_reg_id = 3,
> +                       .module_bit = 2,
> +                       .idlest_reg_id = 3,
> +                       .idlest_idle_bit = 2,
> +               },
> +       },
> +       .slaves         = omap34xx_usb_tll_hs_slaves,
> +       .slaves_cnt     = ARRAY_SIZE(omap34xx_usb_tll_hs_slaves),
> +       .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
> +       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
>  static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
>        &omap3xxx_l3_main_hwmod,
>        &omap3xxx_l4_core_hwmod,
> @@ -3278,6 +3552,11 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
>        /* usbotg for am35x */
>        &am35xx_usbhsotg_hwmod,
>
> +       &omap34xx_usb_host_hs_hwmod,
> +       &omap34xx_usbhs_ohci_hwmod,
> +       &omap34xx_usbhs_ehci_hwmod,
> +       &omap34xx_usb_tll_hs_hwmod,
> +
>        NULL,
>  };
>
> --
> 1.6.0.4
>
> --
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>
Munegowda, Keshava Aug. 12, 2011, 5:46 a.m. UTC | #2
On Thu, Aug 11, 2011 at 8:53 PM, Ming Lei <tom.leiming@gmail.com> wrote:
> Hi,
>
> On Tue, Aug 9, 2011 at 10:15 PM, Keshava Munegowda
> <keshava_mgowda@ti.com> wrote:
>> Following 4 hwmod strcuture are added:
>> UHH hwmod of usbhs with uhh base address and functional clock,
>> EHCI hwmod with irq and base address,
>> OHCI hwmod with irq and base address,
>> TLL hwmod of usbhs with the TLL base address and irq.
>>
>> Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
>> ---
>>  arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |  279 ++++++++++++++++++++++++++++
>>  1 files changed, 279 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> index 59fdb9f..d7316b3 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> @@ -84,6 +84,10 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
>>  static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
>>  static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
>>  static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
>> +static struct omap_hwmod omap34xx_usb_host_hs_hwmod;
>> +static struct omap_hwmod omap34xx_usbhs_ohci_hwmod;
>> +static struct omap_hwmod omap34xx_usbhs_ehci_hwmod;
>> +static struct omap_hwmod omap34xx_usb_tll_hs_hwmod;
>>
>>  /* L3 -> L4_CORE interface */
>>  static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
>> @@ -3196,6 +3200,276 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
>>        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
>>  };
>>
>> +/*
>> + * 'usb_host_hs' class
>> + * high-speed multi-port usb host controller
>> + */
>> +static struct omap_hwmod_ocp_if omap34xx_usb_host_hs__l3_main_2 = {
>> +       .master         = &omap34xx_usb_host_hs_hwmod,
>> +       .slave          = &omap3xxx_l3_main_hwmod,
>> +       .clk            = "core_l3_ick",
>> +       .user           = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = {
>> +       .rev_offs       = 0x0000,
>> +       .sysc_offs      = 0x0010,
>> +       .syss_offs      = 0x0014,
>> +       .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
>
> SYSC_HAS_ENAWAKEUP is missed or not needed?

not needed. wakeup will through irq-chaining mechanism.

>
>> +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
>> +                          MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
>> +       .sysc_fields    = &omap_hwmod_sysc_type1,
>> +};
>> +
>> +static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = {
>> +       .name = "usbhs_uhh",
>> +       .sysc = &omap34xx_usb_host_hs_sysc,
>> +};
>> +
>> +static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = {
>> +       &omap34xx_usb_host_hs__l3_main_2,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = {
>> +       {
>> +               .name           = "uhh",
>> +               .pa_start       = 0x48064000,
>> +               .pa_end         = 0x480643ff,
>> +               .flags          = ADDR_TYPE_RT
>> +       },
>> +       {} /* Terminating Entry */
>> +};
>> +
>> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = {
>> +       .master         = &omap3xxx_l4_core_hwmod,
>> +       .slave          = &omap34xx_usb_host_hs_hwmod,
>> +       .clk            = "l4_ick",
>> +       .addr           = omap34xx_usb_host_hs_addrs,
>> +       .user           = OCP_USER_MPU | OCP_USER_SDMA,
>> +};
>
> Even USBHOST_L4_ICLK is used only by USBHOST_SICLK, it is better to
> define a "usbhost_siclk" clk for consistence with TRM.

I dint understand, what is the change you are suggesting?

keshava
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Ming Lei Aug. 12, 2011, 7:25 a.m. UTC | #3
On Fri, Aug 12, 2011 at 1:46 PM, Munegowda, Keshava
<keshava_mgowda@ti.com> wrote:
> On Thu, Aug 11, 2011 at 8:53 PM, Ming Lei <tom.leiming@gmail.com> wrote:

>>> +static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = {
>>> +       .rev_offs       = 0x0000,
>>> +       .sysc_offs      = 0x0010,
>>> +       .syss_offs      = 0x0014,
>>> +       .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
>>
>> SYSC_HAS_ENAWAKEUP is missed or not needed?
>
> not needed. wakeup will through irq-chaining mechanism.

I am wondering how irq-chaining mechanism can wakeup MPU, could you
describe it in a little detail?

In fact, I have tested usb remote wakeup on rc1 plus your patches on beagle
xm, seems the usb mouse can't wakeup MPU at all.

>>
>>> +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
>>> +                          MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
>>> +       .sysc_fields    = &omap_hwmod_sysc_type1,
>>> +};
>>> +
>>> +static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = {
>>> +       .name = "usbhs_uhh",
>>> +       .sysc = &omap34xx_usb_host_hs_sysc,
>>> +};
>>> +
>>> +static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = {
>>> +       &omap34xx_usb_host_hs__l3_main_2,
>>> +};
>>> +
>>> +static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = {
>>> +       {
>>> +               .name           = "uhh",
>>> +               .pa_start       = 0x48064000,
>>> +               .pa_end         = 0x480643ff,
>>> +               .flags          = ADDR_TYPE_RT
>>> +       },
>>> +       {} /* Terminating Entry */
>>> +};
>>> +
>>> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = {
>>> +       .master         = &omap3xxx_l4_core_hwmod,
>>> +       .slave          = &omap34xx_usb_host_hs_hwmod,
>>> +       .clk            = "l4_ick",
>>> +       .addr           = omap34xx_usb_host_hs_addrs,
>>> +       .user           = OCP_USER_MPU | OCP_USER_SDMA,
>>> +};
>>
>> Even USBHOST_L4_ICLK is used only by USBHOST_SICLK, it is better to
>> define a "usbhost_siclk" clk for consistence with TRM.
>
> I dint understand, what is the change you are suggesting?

From 23.2.1 of OMAP35x TRM(Rev. M), USBHOST_SICLK inside
'High-speed USB Host controller' is driven by L4 slave interface
clock, so looks like l4 iclk should be parent of USBHOST_SICLK.

Considered  USBHOST_L4_ICLK is used only by USBHOST_SICLK,
you may ignore my question about it.

thanks,
Munegowda, Keshava Aug. 12, 2011, 8:12 a.m. UTC | #4
On Fri, Aug 12, 2011 at 12:55 PM, Ming Lei <tom.leiming@gmail.com> wrote:
> On Fri, Aug 12, 2011 at 1:46 PM, Munegowda, Keshava
> <keshava_mgowda@ti.com> wrote:
>> On Thu, Aug 11, 2011 at 8:53 PM, Ming Lei <tom.leiming@gmail.com> wrote:
>
>>>> +static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = {
>>>> +       .rev_offs       = 0x0000,
>>>> +       .sysc_offs      = 0x0010,
>>>> +       .syss_offs      = 0x0014,
>>>> +       .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
>>>
>>> SYSC_HAS_ENAWAKEUP is missed or not needed?
>>
>> not needed. wakeup will through irq-chaining mechanism.
>
> I am wondering how irq-chaining mechanism can wakeup MPU, could you
> describe it in a little detail?
>
> In fact, I have tested usb remote wakeup on rc1 plus your patches on beagle
> xm, seems the usb mouse can't wakeup MPU at all.
>
>>>
>>>> +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
>>>> +                          MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
>>>> +       .sysc_fields    = &omap_hwmod_sysc_type1,
>>>> +};
>>>> +
>>>> +static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = {
>>>> +       .name = "usbhs_uhh",
>>>> +       .sysc = &omap34xx_usb_host_hs_sysc,
>>>> +};
>>>> +
>>>> +static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = {
>>>> +       &omap34xx_usb_host_hs__l3_main_2,
>>>> +};
>>>> +
>>>> +static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = {
>>>> +       {
>>>> +               .name           = "uhh",
>>>> +               .pa_start       = 0x48064000,
>>>> +               .pa_end         = 0x480643ff,
>>>> +               .flags          = ADDR_TYPE_RT
>>>> +       },
>>>> +       {} /* Terminating Entry */
>>>> +};
>>>> +
>>>> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = {
>>>> +       .master         = &omap3xxx_l4_core_hwmod,
>>>> +       .slave          = &omap34xx_usb_host_hs_hwmod,
>>>> +       .clk            = "l4_ick",
>>>> +       .addr           = omap34xx_usb_host_hs_addrs,
>>>> +       .user           = OCP_USER_MPU | OCP_USER_SDMA,
>>>> +};
>>>
>>> Even USBHOST_L4_ICLK is used only by USBHOST_SICLK, it is better to
>>> define a "usbhost_siclk" clk for consistence with TRM.
>>
>> I dint understand, what is the change you are suggesting?
>
> From 23.2.1 of OMAP35x TRM(Rev. M), USBHOST_SICLK inside
> 'High-speed USB Host controller' is driven by L4 slave interface
> clock, so looks like l4 iclk should be parent of USBHOST_SICLK.
>
> Considered  USBHOST_L4_ICLK is used only by USBHOST_SICLK,
> you may ignore my question about it.
>
> thanks,
> --
> Ming Lei

Thanks Ming Lei

keshava
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 59fdb9f..d7316b3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -84,6 +84,10 @@  static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
 static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
 static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
 static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
+static struct omap_hwmod omap34xx_usb_host_hs_hwmod;
+static struct omap_hwmod omap34xx_usbhs_ohci_hwmod;
+static struct omap_hwmod omap34xx_usbhs_ehci_hwmod;
+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod;
 
 /* L3 -> L4_CORE interface */
 static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -3196,6 +3200,276 @@  static struct omap_hwmod omap3xxx_mmc3_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
+/*
+ * 'usb_host_hs' class
+ * high-speed multi-port usb host controller
+ */
+static struct omap_hwmod_ocp_if omap34xx_usb_host_hs__l3_main_2 = {
+	.master		= &omap34xx_usb_host_hs_hwmod,
+	.slave		= &omap3xxx_l3_main_hwmod,
+	.clk		= "core_l3_ick",
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0010,
+	.syss_offs	= 0x0014,
+	.sysc_flags	= (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = {
+	.name = "usbhs_uhh",
+	.sysc = &omap34xx_usb_host_hs_sysc,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = {
+	&omap34xx_usb_host_hs__l3_main_2,
+};
+
+static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = {
+	{
+		.name		= "uhh",
+		.pa_start	= 0x48064000,
+		.pa_end		= 0x480643ff,
+		.flags		= ADDR_TYPE_RT
+	},
+	{} /* Terminating Entry */
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = {
+	.master		= &omap3xxx_l4_core_hwmod,
+	.slave		= &omap34xx_usb_host_hs_hwmod,
+	.clk		= "l4_ick",
+	.addr		= omap34xx_usb_host_hs_addrs,
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if omap34xx_f128m_cfg__usb_host_hs = {
+	.clk		= "usbhost_120m_fck",
+	.user		= OCP_USER_MPU,
+	.flags		= OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if omap34xx_f48m_cfg__usb_host_hs = {
+	.clk		= "usbhost_48m_fck",
+	.user		= OCP_USER_MPU,
+	.flags		= OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_slaves[] = {
+	&omap34xx_l4_cfg__usb_host_hs,
+	&omap34xx_f128m_cfg__usb_host_hs,
+	&omap34xx_f48m_cfg__usb_host_hs,
+};
+
+static struct omap_hwmod omap34xx_usb_host_hs_hwmod = {
+	.name		= "usbhs_uhh",
+	.class		= &omap34xx_usb_host_hs_hwmod_class,
+	.main_clk	= "usbhost_ick",
+	.prcm = {
+		.omap2 = {
+			.module_offs = OMAP3430ES2_USBHOST_MOD,
+			.prcm_reg_id = 1,
+			.module_bit = 0,
+			.idlest_reg_id = 1,
+			.idlest_idle_bit = 1,
+			.idlest_stdby_bit = 0,
+		},
+	},
+	.slaves		= omap34xx_usb_host_hs_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap34xx_usb_host_hs_slaves),
+	.masters	= omap34xx_usb_host_hs_masters,
+	.masters_cnt	= ARRAY_SIZE(omap34xx_usb_host_hs_masters),
+	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* 'usbhs_ohci' class  */
+static struct omap_hwmod_ocp_if omap34xx_usbhs_ohci__l3_main_2 = {
+	.master		= &omap34xx_usbhs_ohci_hwmod,
+	.slave		= &omap3xxx_l3_main_hwmod,
+	.clk		= "core_l3_ick",
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_class omap34xx_usbhs_ohci_hwmod_class = {
+	.name = "usbhs_ohci",
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usbhs_ohci_masters[] = {
+	&omap34xx_usbhs_ohci__l3_main_2,
+};
+
+static struct omap_hwmod_irq_info omap34xx_usbhs_ohci_irqs[] = {
+	{ .name = "ohci-irq", .irq = 76 },
+	{ .irq = -1 } /* Terminating IRQ */
+};
+
+static struct omap_hwmod_addr_space omap34xx_usbhs_ohci_addrs[] = {
+	{
+		.name		= "ohci",
+		.pa_start	= 0x48064400,
+		.pa_end		= 0x480647FF,
+		.flags		= ADDR_MAP_ON_INIT
+	},
+	{} /* Terminating Entry */
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usbhs_ohci = {
+	.master		= &omap3xxx_l4_core_hwmod,
+	.slave		= &omap34xx_usbhs_ohci_hwmod,
+	.clk		= "l4_ick",
+	.addr		= omap34xx_usbhs_ohci_addrs,
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usbhs_ohci_slaves[] = {
+	&omap34xx_l4_cfg__usbhs_ohci,
+};
+
+static struct omap_hwmod omap34xx_usbhs_ohci_hwmod = {
+	.name		= "usbhs_ohci",
+	.class		= &omap34xx_usbhs_ohci_hwmod_class,
+	.mpu_irqs	= omap34xx_usbhs_ohci_irqs,
+	.slaves		= omap34xx_usbhs_ohci_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap34xx_usbhs_ohci_slaves),
+	.masters	= omap34xx_usbhs_ohci_masters,
+	.masters_cnt	= ARRAY_SIZE(omap34xx_usbhs_ohci_masters),
+	.flags		= HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/* 'usbhs_ehci' class  */
+static struct omap_hwmod_ocp_if omap34xx_usbhs_ehci__l3_main_2 = {
+	.master		= &omap34xx_usbhs_ehci_hwmod,
+	.slave		= &omap3xxx_l3_main_hwmod,
+	.clk		= "core_l3_ick",
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_class omap34xx_usbhs_ehci_hwmod_class = {
+	.name = "usbhs_ehci",
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usbhs_ehci_masters[] = {
+	&omap34xx_usbhs_ehci__l3_main_2,
+};
+
+static struct omap_hwmod_irq_info omap34xx_usbhs_ehci_irqs[] = {
+	{ .name = "ehci-irq", .irq = 77 },
+	{ .irq = -1 } /* Terminating IRQ */
+};
+
+static struct omap_hwmod_addr_space omap34xx_usbhs_ehci_addrs[] = {
+	{
+		.name		= "ehci",
+		.pa_start	= 0x48064800,
+		.pa_end		= 0x48064CFF,
+		.flags		= ADDR_MAP_ON_INIT
+	},
+	{} /* Terminating Entry */
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usbhs_ehci = {
+	.master		= &omap3xxx_l4_core_hwmod,
+	.slave		= &omap34xx_usbhs_ehci_hwmod,
+	.clk		= "l4_ick",
+	.addr		= omap34xx_usbhs_ehci_addrs,
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usbhs_ehci_slaves[] = {
+	&omap34xx_l4_cfg__usbhs_ehci,
+};
+
+static struct omap_hwmod omap34xx_usbhs_ehci_hwmod = {
+	.name		= "usbhs_ehci",
+	.class		= &omap34xx_usbhs_ehci_hwmod_class,
+	.mpu_irqs	= omap34xx_usbhs_ehci_irqs,
+	.slaves		= omap34xx_usbhs_ehci_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap34xx_usbhs_ehci_slaves),
+	.masters	= omap34xx_usbhs_ehci_masters,
+	.masters_cnt	= ARRAY_SIZE(omap34xx_usbhs_ehci_masters),
+	.flags		= HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/*
+ * 'usb_tll_hs' class
+ * usb_tll_hs module is the adapter on the usb_host_hs ports
+ */
+static struct omap_hwmod_class_sysconfig omap34xx_usb_tll_hs_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0010,
+	.syss_offs	= 0x0014,
+	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap34xx_usb_tll_hs_hwmod_class = {
+	.name = "usbhs_tll",
+	.sysc = &omap34xx_usb_tll_hs_sysc,
+};
+
+static struct omap_hwmod_irq_info omap34xx_usb_tll_hs_irqs[] = {
+	{ .name = "tll-irq", .irq = 78 },
+	{ .irq = -1 } /* Terminating IRQ */
+};
+
+static struct omap_hwmod_addr_space omap34xx_usb_tll_hs_addrs[] = {
+	{
+		.name		= "tll",
+		.pa_start	= 0x48062000,
+		.pa_end		= 0x48062fff,
+		.flags		= ADDR_TYPE_RT
+	},
+	{} /* Terminating Entry */
+};
+
+static struct omap_hwmod_ocp_if omap34xx_f_cfg__usb_tll_hs = {
+	.clk		= "usbtll_fck",
+	.user		= OCP_USER_MPU,
+	.flags		= OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_tll_hs = {
+	.master		= &omap3xxx_l4_core_hwmod,
+	.slave		= &omap34xx_usb_tll_hs_hwmod,
+	.clk		= "l4_ick",
+	.addr		= omap34xx_usb_tll_hs_addrs,
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usb_tll_hs_slaves[] = {
+	&omap34xx_l4_cfg__usb_tll_hs,
+	&omap34xx_f_cfg__usb_tll_hs,
+};
+
+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod = {
+	.name		= "usbhs_tll",
+	.class		= &omap34xx_usb_tll_hs_hwmod_class,
+	.mpu_irqs	= omap34xx_usb_tll_hs_irqs,
+	.main_clk	= "usbtll_ick",
+	.prcm = {
+		.omap2 = {
+			.module_offs = CORE_MOD,
+			.prcm_reg_id = 3,
+			.module_bit = 2,
+			.idlest_reg_id = 3,
+			.idlest_idle_bit = 2,
+		},
+	},
+	.slaves		= omap34xx_usb_tll_hs_slaves,
+	.slaves_cnt	= ARRAY_SIZE(omap34xx_usb_tll_hs_slaves),
+	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
 static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
 	&omap3xxx_l3_main_hwmod,
 	&omap3xxx_l4_core_hwmod,
@@ -3278,6 +3552,11 @@  static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
 	/* usbotg for am35x */
 	&am35xx_usbhsotg_hwmod,
 
+	&omap34xx_usb_host_hs_hwmod,
+	&omap34xx_usbhs_ohci_hwmod,
+	&omap34xx_usbhs_ehci_hwmod,
+	&omap34xx_usb_tll_hs_hwmod,
+
 	NULL,
 };