| Message ID | 20191202051711.GZ4196@zhen-hp.sh.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [PULL] gvt-next-fixes | expand |
ping.. On 2019.12.02 13:17:11 +0800, Zhenyu Wang wrote: > > Hi, > > More gvt fixes for 5.5-rc. One is MI_ATOMIC cmd parser fix which > missed 5.4 and another two for CFL non-priv reg access fixes. > > Thanks > -- > The following changes since commit 83faaf074e6d1ca4d1441aded0d3f01bce413479: > > drm/i915/gvt: Stop initializing pvinfo through reading mmio (2019-11-08 11:08:07 +0800) > > are available in the Git repository at: > > https://github.com/intel/gvt-linux tags/gvt-next-fixes-2019-12-02 > > for you to fetch changes up to 92b1aa773fadb4e2a90ed5d3beecb422d568ad9a: > > drm/i915/gvt: Fix cmd length check for MI_ATOMIC (2019-12-02 11:06:49 +0800) > > ---------------------------------------------------------------- > gvt-next-fixes-2019-12-02 > > - Fix cmd parser for MI_ATOMIC (Zhenyu) > - Fix non-priv register access warning on CFL (Fred) > > ---------------------------------------------------------------- > Gao, Fred (2): > drm/i915/gvt: Refine non privilege register address calucation > drm/i915/gvt: Update force-to-nonpriv register whitelist > > Zhenyu Wang (1): > drm/i915/gvt: Fix cmd length check for MI_ATOMIC > > drivers/gpu/drm/i915/gvt/cmd_parser.c | 6 +++--- > drivers/gpu/drm/i915/gvt/handlers.c | 5 +++-- > 2 files changed, 6 insertions(+), 5 deletions(-) > > > -- > Open Source Technology Center, Intel ltd. > > $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
Quoting Zhenyu Wang (2019-12-05 08:11:41) > > ping.. This was pulled, but my dim push was interrupted so I had to re-push and wait for CI results. Looks all good. Thanks for the PR. Do you have a plan to start adding Fixes: and Link: tags to the GVT commits? Regards, Joonas
On 2019.12.05 10:14:35 +0200, Joonas Lahtinen wrote: > Quoting Zhenyu Wang (2019-12-05 08:11:41) > > > > ping.. > > This was pulled, but my dim push was interrupted so I had to re-push and > wait for CI results. Looks all good. Thanks for the PR. > > Do you have a plan to start adding Fixes: and Link: tags to the GVT > commits? > For Fixes: we've already been caution to add when needed, I'll try to handle Link: tag later. Thanks
Hi, More gvt fixes for 5.5-rc. One is MI_ATOMIC cmd parser fix which missed 5.4 and another two for CFL non-priv reg access fixes. Thanks -- The following changes since commit 83faaf074e6d1ca4d1441aded0d3f01bce413479: drm/i915/gvt: Stop initializing pvinfo through reading mmio (2019-11-08 11:08:07 +0800) are available in the Git repository at: https://github.com/intel/gvt-linux tags/gvt-next-fixes-2019-12-02 for you to fetch changes up to 92b1aa773fadb4e2a90ed5d3beecb422d568ad9a: drm/i915/gvt: Fix cmd length check for MI_ATOMIC (2019-12-02 11:06:49 +0800) ---------------------------------------------------------------- gvt-next-fixes-2019-12-02 - Fix cmd parser for MI_ATOMIC (Zhenyu) - Fix non-priv register access warning on CFL (Fred) ---------------------------------------------------------------- Gao, Fred (2): drm/i915/gvt: Refine non privilege register address calucation drm/i915/gvt: Update force-to-nonpriv register whitelist Zhenyu Wang (1): drm/i915/gvt: Fix cmd length check for MI_ATOMIC drivers/gpu/drm/i915/gvt/cmd_parser.c | 6 +++--- drivers/gpu/drm/i915/gvt/handlers.c | 5 +++-- 2 files changed, 6 insertions(+), 5 deletions(-)