Message ID | 20191107000917.1092409-3-bjorn.andersson@linaro.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | phy: qcom-qmp: Add SDM845 QMP and QHP PHYs | expand |
On Wed, Nov 6, 2019 at 4:09 PM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > It's typical for the QHP PHY to take slightly above 1ms to initialize, > so increase the timeout of the PHY ready check to 10ms - as already done > in the downstream PCIe driver. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Evan Green <evgreen@chromium.org> Should this have a Fixes tag for 14ced7e3a1ae9 ("phy: qcom-qmp: Correct ready status, again")?
On Tue 10 Dec 10:47 PST 2019, Evan Green wrote: > On Wed, Nov 6, 2019 at 4:09 PM Bjorn Andersson > <bjorn.andersson@linaro.org> wrote: > > > > It's typical for the QHP PHY to take slightly above 1ms to initialize, > > so increase the timeout of the PHY ready check to 10ms - as already done > > in the downstream PCIe driver. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > Tested-by: Evan Green <evgreen@chromium.org> > Thanks. > Should this have a Fixes tag for 14ced7e3a1ae9 ("phy: qcom-qmp: > Correct ready status, again")? For UFS it would be 885bd765963b ("phy: qcom-qmp: Correct READY_STATUS poll break condition"), but I think that before the two we would exit the poll immediately, so we would only hit the timeout in the "error" case - where the PHY did come up in a timely fashion. So I don't think there is a particular commit to "Fixes:"... But given that this is no longer only needed for the (new) QHP PCIe instance it would be reasonable to Cc: stable, to get it into v5.4 Regards, Bjorn
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 091e20303a14..66f91726b8b2 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -66,7 +66,7 @@ /* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */ #define CLAMP_EN BIT(0) /* enables i/o clamp_n */ -#define PHY_INIT_COMPLETE_TIMEOUT 1000 +#define PHY_INIT_COMPLETE_TIMEOUT 10000 #define POWER_DOWN_DELAY_US_MIN 10 #define POWER_DOWN_DELAY_US_MAX 11
It's typical for the QHP PHY to take slightly above 1ms to initialize, so increase the timeout of the PHY ready check to 10ms - as already done in the downstream PCIe driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- Changes since v2: - None drivers/phy/qualcomm/phy-qcom-qmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)