Message ID | 20191122090610.17015-1-michael.kao@mediatek.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 19f62c76f1c6be9896f3efb7312501a2260184b6 |
Headers | show |
Series | [RESEND] arm64: dts: mt8173: Add dynamic power node. | expand |
Hi Michael, On 22/11/2019 10:06, michael.kao@mediatek.com wrote: > From: "michael.kao" <michael.kao@mediatek.com> > > This device node is for calculating dynamic power in mW. > Since mt8173 has two clusters, there are two dynamic power > coefficient as well. Are you sure about the values? Usually, Big is ~x4 little, here it is ~x2. > Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> > Signed-off-by: Michael.Kao <michael.kao@mediatek.com> > > --- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > index 15f1842f6df3..b03ca5a71338 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > @@ -157,6 +157,7 @@ > enable-method = "psci"; > cpu-idle-states = <&CPU_SLEEP_0>; > #cooling-cells = <2>; > + dynamic-power-coefficient = <263>; > clocks = <&infracfg CLK_INFRA_CA53SEL>, > <&apmixedsys CLK_APMIXED_MAINPLL>; > clock-names = "cpu", "intermediate"; > @@ -170,6 +171,7 @@ > enable-method = "psci"; > cpu-idle-states = <&CPU_SLEEP_0>; > #cooling-cells = <2>; > + dynamic-power-coefficient = <263>; > clocks = <&infracfg CLK_INFRA_CA53SEL>, > <&apmixedsys CLK_APMIXED_MAINPLL>; > clock-names = "cpu", "intermediate"; > @@ -183,6 +185,7 @@ > enable-method = "psci"; > cpu-idle-states = <&CPU_SLEEP_0>; > #cooling-cells = <2>; > + dynamic-power-coefficient = <530>; > clocks = <&infracfg CLK_INFRA_CA72SEL>, > <&apmixedsys CLK_APMIXED_MAINPLL>; > clock-names = "cpu", "intermediate"; > @@ -196,6 +199,7 @@ > enable-method = "psci"; > cpu-idle-states = <&CPU_SLEEP_0>; > #cooling-cells = <2>; > + dynamic-power-coefficient = <530>; > clocks = <&infracfg CLK_INFRA_CA72SEL>, > <&apmixedsys CLK_APMIXED_MAINPLL>; > clock-names = "cpu", "intermediate"; >
On Thu, 2019-12-05 at 17:00 +0100, Daniel Lezcano wrote: > Hi Michael, > > > On 22/11/2019 10:06, michael.kao@mediatek.com wrote: > > From: "michael.kao" <michael.kao@mediatek.com> > > > > This device node is for calculating dynamic power in mW. > > Since mt8173 has two clusters, there are two dynamic power > > coefficient as well. > > Are you sure about the values? Usually, Big is ~x4 little, here it is ~x2. Hi Daniel, I have confirmed again with our IC designer. The dynamic power coefficients are these value is right. Designer comment that it is result from different IC implement. > > > Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> > > Signed-off-by: Michael.Kao <michael.kao@mediatek.com> > > > > --- > > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > > index 15f1842f6df3..b03ca5a71338 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > > @@ -157,6 +157,7 @@ > > enable-method = "psci"; > > cpu-idle-states = <&CPU_SLEEP_0>; > > #cooling-cells = <2>; > > + dynamic-power-coefficient = <263>; > > clocks = <&infracfg CLK_INFRA_CA53SEL>, > > <&apmixedsys CLK_APMIXED_MAINPLL>; > > clock-names = "cpu", "intermediate"; > > @@ -170,6 +171,7 @@ > > enable-method = "psci"; > > cpu-idle-states = <&CPU_SLEEP_0>; > > #cooling-cells = <2>; > > + dynamic-power-coefficient = <263>; > > clocks = <&infracfg CLK_INFRA_CA53SEL>, > > <&apmixedsys CLK_APMIXED_MAINPLL>; > > clock-names = "cpu", "intermediate"; > > @@ -183,6 +185,7 @@ > > enable-method = "psci"; > > cpu-idle-states = <&CPU_SLEEP_0>; > > #cooling-cells = <2>; > > + dynamic-power-coefficient = <530>; > > clocks = <&infracfg CLK_INFRA_CA72SEL>, > > <&apmixedsys CLK_APMIXED_MAINPLL>; > > clock-names = "cpu", "intermediate"; > > @@ -196,6 +199,7 @@ > > enable-method = "psci"; > > cpu-idle-states = <&CPU_SLEEP_0>; > > #cooling-cells = <2>; > > + dynamic-power-coefficient = <530>; > > clocks = <&infracfg CLK_INFRA_CA72SEL>, > > <&apmixedsys CLK_APMIXED_MAINPLL>; > > clock-names = "cpu", "intermediate"; > > > >
On 11/12/2019 09:13, Michael Kao wrote: > On Thu, 2019-12-05 at 17:00 +0100, Daniel Lezcano wrote: >> Hi Michael, >> >> >> On 22/11/2019 10:06, michael.kao@mediatek.com wrote: >>> From: "michael.kao" <michael.kao@mediatek.com> >>> >>> This device node is for calculating dynamic power in mW. >>> Since mt8173 has two clusters, there are two dynamic power >>> coefficient as well. >> >> Are you sure about the values? Usually, Big is ~x4 little, here it is ~x2. > > Hi Daniel, > > I have confirmed again with our IC designer. > The dynamic power coefficients are these value is right. > Designer comment that it is result from different IC implement. Applied to v5.5-next/dts64 Thanks! Matthias >> >>> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> >>> Signed-off-by: Michael.Kao <michael.kao@mediatek.com> >>> >>> --- >>> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi >>> index 15f1842f6df3..b03ca5a71338 100644 >>> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi >>> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi >>> @@ -157,6 +157,7 @@ >>> enable-method = "psci"; >>> cpu-idle-states = <&CPU_SLEEP_0>; >>> #cooling-cells = <2>; >>> + dynamic-power-coefficient = <263>; >>> clocks = <&infracfg CLK_INFRA_CA53SEL>, >>> <&apmixedsys CLK_APMIXED_MAINPLL>; >>> clock-names = "cpu", "intermediate"; >>> @@ -170,6 +171,7 @@ >>> enable-method = "psci"; >>> cpu-idle-states = <&CPU_SLEEP_0>; >>> #cooling-cells = <2>; >>> + dynamic-power-coefficient = <263>; >>> clocks = <&infracfg CLK_INFRA_CA53SEL>, >>> <&apmixedsys CLK_APMIXED_MAINPLL>; >>> clock-names = "cpu", "intermediate"; >>> @@ -183,6 +185,7 @@ >>> enable-method = "psci"; >>> cpu-idle-states = <&CPU_SLEEP_0>; >>> #cooling-cells = <2>; >>> + dynamic-power-coefficient = <530>; >>> clocks = <&infracfg CLK_INFRA_CA72SEL>, >>> <&apmixedsys CLK_APMIXED_MAINPLL>; >>> clock-names = "cpu", "intermediate"; >>> @@ -196,6 +199,7 @@ >>> enable-method = "psci"; >>> cpu-idle-states = <&CPU_SLEEP_0>; >>> #cooling-cells = <2>; >>> + dynamic-power-coefficient = <530>; >>> clocks = <&infracfg CLK_INFRA_CA72SEL>, >>> <&apmixedsys CLK_APMIXED_MAINPLL>; >>> clock-names = "cpu", "intermediate"; >>> >> >> >
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 15f1842f6df3..b03ca5a71338 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -157,6 +157,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <263>; clocks = <&infracfg CLK_INFRA_CA53SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -170,6 +171,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <263>; clocks = <&infracfg CLK_INFRA_CA53SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -183,6 +185,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <530>; clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -196,6 +199,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <530>; clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate";