| Message ID | 20191211061911.238393-3-hsinyi@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: bridge: anx7688 and mux drivers | expand |
Hi Hsin-Yi, On 11/12/19 7:19, Hsin-Yi Wang wrote: > From: Nicolas Boichat <drinkcat@chromium.org> > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > that has an internal microcontroller. > > The only reason a Linux kernel driver is necessary is to reject > resolutions that require more bandwidth than what is available on > the DP side. DP bandwidth and lane count are reported by the bridge > via 2 registers on I2C. > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > --- Although I am not a drm expert I did an initial review of this patch before sending and looks good to me now. Also I just tested with current mainline on my ELM device and I am happy to have display now, so thanks for sending this upstream: Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> > drivers/gpu/drm/bridge/Kconfig | 9 + > drivers/gpu/drm/bridge/Makefile | 1 + > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > 3 files changed, 212 insertions(+) > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > index 34362976cd6f..1f3fc6bec842 100644 > --- a/drivers/gpu/drm/bridge/Kconfig > +++ b/drivers/gpu/drm/bridge/Kconfig > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > menu "Display Interface Bridges" > depends on DRM && DRM_BRIDGE > > +config DRM_ANALOGIX_ANX7688 > + tristate "Analogix ANX7688 bridge" > + select DRM_KMS_HELPER > + select REGMAP_I2C > + ---help--- > + ANX7688 is a transmitter to support DisplayPort over USB-C for > + smartphone and tablets. > + This driver only supports the HDMI to DP component of the chip. > + > config DRM_ANALOGIX_ANX78XX > tristate "Analogix ANX78XX bridge" > select DRM_KMS_HELPER > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > index 4934fcf5a6f8..7a1e0ec032e6 100644 > --- a/drivers/gpu/drm/bridge/Makefile > +++ b/drivers/gpu/drm/bridge/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > new file mode 100644 > index 000000000000..baaed48d6201 > --- /dev/null > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > @@ -0,0 +1,202 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * ANX7688 HDMI->DP bridge driver > + * > + * Copyright 2016 Google LLC > + */ > + > +#include <linux/i2c.h> > +#include <linux/module.h> > +#include <linux/regmap.h> > +#include <drm/drm_bridge.h> > + > +/* Register addresses */ > +#define VENDOR_ID_REG 0x00 > +#define DEVICE_ID_REG 0x02 > + > +#define FW_VERSION_REG 0x80 > + > +#define DP_BANDWIDTH_REG 0x85 > +#define DP_LANE_COUNT_REG 0x86 > + > +#define VENDOR_ID 0x1f29 > +#define DEVICE_ID 0x7688 > + > +/* First supported firmware version (0.85) */ > +#define MINIMUM_FW_VERSION 0x0085 > + > +struct anx7688 { > + struct drm_bridge bridge; > + struct i2c_client *client; > + struct regmap *regmap; > + > + bool filter; > +}; > + > +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge) > +{ > + return container_of(bridge, struct anx7688, bridge); > +} > + > +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge, > + const struct drm_display_mode *mode, > + struct drm_display_mode *adjusted_mode) > +{ > + struct anx7688 *anx7688 = bridge_to_anx7688(bridge); > + u8 regs[2]; > + u8 dpbw, lanecount; > + int totalbw, requiredbw; > + int ret; > + > + if (!anx7688->filter) > + return true; > + > + /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */ > + ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2); > + if (ret < 0) { > + dev_err(&anx7688->client->dev, > + "Failed to read bandwidth/lane count\n"); > + return false; > + } > + dpbw = regs[0]; > + lanecount = regs[1]; > + > + /* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */ > + if (dpbw > 0x19 || lanecount > 2) { > + dev_err(&anx7688->client->dev, > + "Invalid bandwidth/lane count (%02x/%d)\n", > + dpbw, lanecount); > + return false; > + } > + > + /* Compute available bandwidth (kHz) */ > + totalbw = dpbw * lanecount * 270000 * 8 / 10; > + > + /* Required bandwidth (8 bpc, kHz) */ > + requiredbw = mode->clock * 8 * 3; > + > + dev_dbg(&anx7688->client->dev, > + "DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n", > + totalbw, dpbw, lanecount, requiredbw); > + > + if (totalbw == 0) { > + dev_warn(&anx7688->client->dev, > + "Bandwidth/lane count are 0, not rejecting modes\n"); > + return true; > + } > + > + return totalbw >= requiredbw; > +} > + > +static const struct drm_bridge_funcs anx7688_bridge_funcs = { > + .mode_fixup = anx7688_bridge_mode_fixup, > +}; > + > +static const struct regmap_config anx7688_regmap_config = { > + .reg_bits = 8, > + .val_bits = 8, > +}; > + > +static int anx7688_i2c_probe(struct i2c_client *client, > + const struct i2c_device_id *id) > +{ > + struct anx7688 *anx7688; > + struct device *dev = &client->dev; > + int ret; > + u8 buffer[4]; > + u16 vendor, device, fwversion; > + > + anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL); > + if (!anx7688) > + return -ENOMEM; > + > +#if IS_ENABLED(CONFIG_OF) > + anx7688->bridge.of_node = client->dev.of_node; > +#endif > + > + anx7688->client = client; > + i2c_set_clientdata(client, anx7688); > + > + anx7688->regmap = > + devm_regmap_init_i2c(client, &anx7688_regmap_config); > + > + /* Read both vendor and device id (4 bytes). */ > + ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4); > + if (ret) { > + dev_err(dev, "Failed to read chip vendor/device id\n"); > + return ret; > + } > + > + vendor = (u16)buffer[1] << 8 | buffer[0]; > + device = (u16)buffer[3] << 8 | buffer[2]; > + if (vendor != VENDOR_ID || device != DEVICE_ID) { > + dev_err(dev, "Invalid vendor/device id %04x/%04x\n", > + vendor, device); > + return -ENODEV; > + } > + > + ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2); > + if (ret) { > + dev_err(&client->dev, "Failed to read firmware version\n"); > + return ret; > + } > + > + fwversion = (u16)buffer[0] << 8 | buffer[1]; > + dev_info(dev, "ANX7688 firwmare version %02x.%02x\n", > + buffer[0], buffer[1]); > + > + /* FW version >= 0.85 supports bandwidth/lane count registers */ > + if (fwversion >= MINIMUM_FW_VERSION) { > + anx7688->filter = true; > + } else { > + /* Warn, but not fail, for backwards compatibility. */ > + dev_warn(dev, > + "Old ANX7688 FW version (%02x.%02x), not filtering\n", > + buffer[0], buffer[1]); > + } > + > + anx7688->bridge.funcs = &anx7688_bridge_funcs; > + drm_bridge_add(&anx7688->bridge); > + > + return 0; > +} > + > +static int anx7688_i2c_remove(struct i2c_client *client) > +{ > + struct anx7688 *anx7688 = i2c_get_clientdata(client); > + > + drm_bridge_remove(&anx7688->bridge); > + > + return 0; > +} > + > +static const struct i2c_device_id anx7688_id[] = { > + { "anx7688", 0 }, > + { /* sentinel */ } > +}; > + > +MODULE_DEVICE_TABLE(i2c, anx7688_id); > + > +#if IS_ENABLED(CONFIG_OF) > +static const struct of_device_id anx7688_match_table[] = { > + { .compatible = "analogix,anx7688", }, > + { /* sentinel */ }, > +}; > +MODULE_DEVICE_TABLE(of, anx7688_match_table); > +#endif > + > +static struct i2c_driver anx7688_driver = { > + .driver = { > + .name = "anx7688", > + .of_match_table = of_match_ptr(anx7688_match_table), > + }, > + .probe = anx7688_i2c_probe, > + .remove = anx7688_i2c_remove, > + .id_table = anx7688_id, > +}; > + > +module_i2c_driver(anx7688_driver); > + > +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver"); > +MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>"); > +MODULE_LICENSE("GPL v2"); >
Hi Hsin-Yi and Nicolas, Thank you for the patch. On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > From: Nicolas Boichat <drinkcat@chromium.org> > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > that has an internal microcontroller. > > The only reason a Linux kernel driver is necessary is to reject > resolutions that require more bandwidth than what is available on > the DP side. DP bandwidth and lane count are reported by the bridge > via 2 registers on I2C. How about power, doesn't this chip have power supplies that potentially need to be controlled ? > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > --- > drivers/gpu/drm/bridge/Kconfig | 9 + > drivers/gpu/drm/bridge/Makefile | 1 + > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > 3 files changed, 212 insertions(+) > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > index 34362976cd6f..1f3fc6bec842 100644 > --- a/drivers/gpu/drm/bridge/Kconfig > +++ b/drivers/gpu/drm/bridge/Kconfig > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > menu "Display Interface Bridges" > depends on DRM && DRM_BRIDGE > > +config DRM_ANALOGIX_ANX7688 > + tristate "Analogix ANX7688 bridge" > + select DRM_KMS_HELPER > + select REGMAP_I2C > + ---help--- > + ANX7688 is a transmitter to support DisplayPort over USB-C for > + smartphone and tablets. > + This driver only supports the HDMI to DP component of the chip. > + > config DRM_ANALOGIX_ANX78XX > tristate "Analogix ANX78XX bridge" > select DRM_KMS_HELPER > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > index 4934fcf5a6f8..7a1e0ec032e6 100644 > --- a/drivers/gpu/drm/bridge/Makefile > +++ b/drivers/gpu/drm/bridge/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > new file mode 100644 > index 000000000000..baaed48d6201 > --- /dev/null > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > @@ -0,0 +1,202 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * ANX7688 HDMI->DP bridge driver > + * > + * Copyright 2016 Google LLC > + */ > + > +#include <linux/i2c.h> > +#include <linux/module.h> > +#include <linux/regmap.h> > +#include <drm/drm_bridge.h> > + > +/* Register addresses */ > +#define VENDOR_ID_REG 0x00 > +#define DEVICE_ID_REG 0x02 > + > +#define FW_VERSION_REG 0x80 > + > +#define DP_BANDWIDTH_REG 0x85 > +#define DP_LANE_COUNT_REG 0x86 Are these registers defined by the ANX7688 hardware, or by the firmware running on the chip (and, I assume, developed by Google) ? > + > +#define VENDOR_ID 0x1f29 > +#define DEVICE_ID 0x7688 > + > +/* First supported firmware version (0.85) */ > +#define MINIMUM_FW_VERSION 0x0085 > + > +struct anx7688 { > + struct drm_bridge bridge; > + struct i2c_client *client; > + struct regmap *regmap; > + > + bool filter; > +}; > + > +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge) > +{ > + return container_of(bridge, struct anx7688, bridge); > +} > + > +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge, > + const struct drm_display_mode *mode, > + struct drm_display_mode *adjusted_mode) > +{ > + struct anx7688 *anx7688 = bridge_to_anx7688(bridge); > + u8 regs[2]; > + u8 dpbw, lanecount; > + int totalbw, requiredbw; > + int ret; > + > + if (!anx7688->filter) > + return true; > + > + /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */ > + ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2); > + if (ret < 0) { > + dev_err(&anx7688->client->dev, > + "Failed to read bandwidth/lane count\n"); > + return false; > + } > + dpbw = regs[0]; > + lanecount = regs[1]; > + > + /* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */ > + if (dpbw > 0x19 || lanecount > 2) { > + dev_err(&anx7688->client->dev, > + "Invalid bandwidth/lane count (%02x/%d)\n", > + dpbw, lanecount); > + return false; > + } > + > + /* Compute available bandwidth (kHz) */ > + totalbw = dpbw * lanecount * 270000 * 8 / 10; > + > + /* Required bandwidth (8 bpc, kHz) */ > + requiredbw = mode->clock * 8 * 3; > + > + dev_dbg(&anx7688->client->dev, > + "DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n", > + totalbw, dpbw, lanecount, requiredbw); > + > + if (totalbw == 0) { > + dev_warn(&anx7688->client->dev, > + "Bandwidth/lane count are 0, not rejecting modes\n"); > + return true; > + } > + > + return totalbw >= requiredbw; > +} > + > +static const struct drm_bridge_funcs anx7688_bridge_funcs = { > + .mode_fixup = anx7688_bridge_mode_fixup, > +}; > + > +static const struct regmap_config anx7688_regmap_config = { > + .reg_bits = 8, > + .val_bits = 8, > +}; > + > +static int anx7688_i2c_probe(struct i2c_client *client, > + const struct i2c_device_id *id) > +{ > + struct anx7688 *anx7688; > + struct device *dev = &client->dev; > + int ret; > + u8 buffer[4]; > + u16 vendor, device, fwversion; > + > + anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL); > + if (!anx7688) > + return -ENOMEM; > + > +#if IS_ENABLED(CONFIG_OF) > + anx7688->bridge.of_node = client->dev.of_node; > +#endif > + > + anx7688->client = client; > + i2c_set_clientdata(client, anx7688); > + > + anx7688->regmap = > + devm_regmap_init_i2c(client, &anx7688_regmap_config); > + > + /* Read both vendor and device id (4 bytes). */ > + ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4); > + if (ret) { > + dev_err(dev, "Failed to read chip vendor/device id\n"); > + return ret; > + } > + > + vendor = (u16)buffer[1] << 8 | buffer[0]; > + device = (u16)buffer[3] << 8 | buffer[2]; > + if (vendor != VENDOR_ID || device != DEVICE_ID) { > + dev_err(dev, "Invalid vendor/device id %04x/%04x\n", > + vendor, device); > + return -ENODEV; > + } > + > + ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2); > + if (ret) { > + dev_err(&client->dev, "Failed to read firmware version\n"); > + return ret; > + } > + > + fwversion = (u16)buffer[0] << 8 | buffer[1]; > + dev_info(dev, "ANX7688 firwmare version %02x.%02x\n", > + buffer[0], buffer[1]); > + > + /* FW version >= 0.85 supports bandwidth/lane count registers */ > + if (fwversion >= MINIMUM_FW_VERSION) { > + anx7688->filter = true; > + } else { > + /* Warn, but not fail, for backwards compatibility. */ > + dev_warn(dev, > + "Old ANX7688 FW version (%02x.%02x), not filtering\n", > + buffer[0], buffer[1]); > + } > + > + anx7688->bridge.funcs = &anx7688_bridge_funcs; > + drm_bridge_add(&anx7688->bridge); > + > + return 0; > +} > + > +static int anx7688_i2c_remove(struct i2c_client *client) > +{ > + struct anx7688 *anx7688 = i2c_get_clientdata(client); > + > + drm_bridge_remove(&anx7688->bridge); > + > + return 0; > +} > + > +static const struct i2c_device_id anx7688_id[] = { > + { "anx7688", 0 }, > + { /* sentinel */ } > +}; > + > +MODULE_DEVICE_TABLE(i2c, anx7688_id); > + > +#if IS_ENABLED(CONFIG_OF) > +static const struct of_device_id anx7688_match_table[] = { > + { .compatible = "analogix,anx7688", }, > + { /* sentinel */ }, > +}; > +MODULE_DEVICE_TABLE(of, anx7688_match_table); > +#endif > + > +static struct i2c_driver anx7688_driver = { > + .driver = { > + .name = "anx7688", > + .of_match_table = of_match_ptr(anx7688_match_table), > + }, > + .probe = anx7688_i2c_probe, > + .remove = anx7688_i2c_remove, > + .id_table = anx7688_id, > +}; > + > +module_i2c_driver(anx7688_driver); > + > +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver"); > +MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>"); > +MODULE_LICENSE("GPL v2");
On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > > Hi Hsin-Yi and Nicolas, > > Thank you for the patch. > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > > From: Nicolas Boichat <drinkcat@chromium.org> > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > > that has an internal microcontroller. > > > > The only reason a Linux kernel driver is necessary is to reject > > resolutions that require more bandwidth than what is available on > > the DP side. DP bandwidth and lane count are reported by the bridge > > via 2 registers on I2C. > > How about power, doesn't this chip have power supplies that potentially > need to be controlled ? > Ideally we should add power supplies as well, but the power is supplied by ec in mt8173 oak board. And we only have this board can test this driver. If we add power supplies in driver we can't test it. > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > --- > > drivers/gpu/drm/bridge/Kconfig | 9 + > > drivers/gpu/drm/bridge/Makefile | 1 + > > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > > 3 files changed, 212 insertions(+) > > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > > index 34362976cd6f..1f3fc6bec842 100644 > > --- a/drivers/gpu/drm/bridge/Kconfig > > +++ b/drivers/gpu/drm/bridge/Kconfig > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > > menu "Display Interface Bridges" > > depends on DRM && DRM_BRIDGE > > > > +config DRM_ANALOGIX_ANX7688 > > + tristate "Analogix ANX7688 bridge" > > + select DRM_KMS_HELPER > > + select REGMAP_I2C > > + ---help--- > > + ANX7688 is a transmitter to support DisplayPort over USB-C for > > + smartphone and tablets. > > + This driver only supports the HDMI to DP component of the chip. > > + > > config DRM_ANALOGIX_ANX78XX > > tristate "Analogix ANX78XX bridge" > > select DRM_KMS_HELPER > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > > index 4934fcf5a6f8..7a1e0ec032e6 100644 > > --- a/drivers/gpu/drm/bridge/Makefile > > +++ b/drivers/gpu/drm/bridge/Makefile > > @@ -1,4 +1,5 @@ > > # SPDX-License-Identifier: GPL-2.0 > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > > new file mode 100644 > > index 000000000000..baaed48d6201 > > --- /dev/null > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > > @@ -0,0 +1,202 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > +/* > > + * ANX7688 HDMI->DP bridge driver > > + * > > + * Copyright 2016 Google LLC > > + */ > > + > > +#include <linux/i2c.h> > > +#include <linux/module.h> > > +#include <linux/regmap.h> > > +#include <drm/drm_bridge.h> > > + > > +/* Register addresses */ > > +#define VENDOR_ID_REG 0x00 > > +#define DEVICE_ID_REG 0x02 > > + > > +#define FW_VERSION_REG 0x80 > > + > > +#define DP_BANDWIDTH_REG 0x85 > > +#define DP_LANE_COUNT_REG 0x86 > > Are these registers defined by the ANX7688 hardware, or by the firmware > running on the chip (and, I assume, developed by Google) ? > By firmware developed by ANX provided to Google. > > + > > +#define VENDOR_ID 0x1f29 > > +#define DEVICE_ID 0x7688 > > + > > +/* First supported firmware version (0.85) */ > > +#define MINIMUM_FW_VERSION 0x0085 > > + > > +struct anx7688 { > > + struct drm_bridge bridge; > > + struct i2c_client *client; > > + struct regmap *regmap; > > + > > + bool filter; > > +}; > > + > > +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge) > > +{ > > + return container_of(bridge, struct anx7688, bridge); > > +} > > + > > +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge, > > + const struct drm_display_mode *mode, > > + struct drm_display_mode *adjusted_mode) > > +{ > > + struct anx7688 *anx7688 = bridge_to_anx7688(bridge); > > + u8 regs[2]; > > + u8 dpbw, lanecount; > > + int totalbw, requiredbw; > > + int ret; > > + > > + if (!anx7688->filter) > > + return true; > > + > > + /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */ > > + ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2); > > + if (ret < 0) { > > + dev_err(&anx7688->client->dev, > > + "Failed to read bandwidth/lane count\n"); > > + return false; > > + } > > + dpbw = regs[0]; > > + lanecount = regs[1]; > > + > > + /* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */ > > + if (dpbw > 0x19 || lanecount > 2) { > > + dev_err(&anx7688->client->dev, > > + "Invalid bandwidth/lane count (%02x/%d)\n", > > + dpbw, lanecount); > > + return false; > > + } > > + > > + /* Compute available bandwidth (kHz) */ > > + totalbw = dpbw * lanecount * 270000 * 8 / 10; > > + > > + /* Required bandwidth (8 bpc, kHz) */ > > + requiredbw = mode->clock * 8 * 3; > > + > > + dev_dbg(&anx7688->client->dev, > > + "DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n", > > + totalbw, dpbw, lanecount, requiredbw); > > + > > + if (totalbw == 0) { > > + dev_warn(&anx7688->client->dev, > > + "Bandwidth/lane count are 0, not rejecting modes\n"); > > + return true; > > + } > > + > > + return totalbw >= requiredbw; > > +} > > + > > +static const struct drm_bridge_funcs anx7688_bridge_funcs = { > > + .mode_fixup = anx7688_bridge_mode_fixup, > > +}; > > + > > +static const struct regmap_config anx7688_regmap_config = { > > + .reg_bits = 8, > > + .val_bits = 8, > > +}; > > + > > +static int anx7688_i2c_probe(struct i2c_client *client, > > + const struct i2c_device_id *id) > > +{ > > + struct anx7688 *anx7688; > > + struct device *dev = &client->dev; > > + int ret; > > + u8 buffer[4]; > > + u16 vendor, device, fwversion; > > + > > + anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL); > > + if (!anx7688) > > + return -ENOMEM; > > + > > +#if IS_ENABLED(CONFIG_OF) > > + anx7688->bridge.of_node = client->dev.of_node; > > +#endif > > + > > + anx7688->client = client; > > + i2c_set_clientdata(client, anx7688); > > + > > + anx7688->regmap = > > + devm_regmap_init_i2c(client, &anx7688_regmap_config); > > + > > + /* Read both vendor and device id (4 bytes). */ > > + ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4); > > + if (ret) { > > + dev_err(dev, "Failed to read chip vendor/device id\n"); > > + return ret; > > + } > > + > > + vendor = (u16)buffer[1] << 8 | buffer[0]; > > + device = (u16)buffer[3] << 8 | buffer[2]; > > + if (vendor != VENDOR_ID || device != DEVICE_ID) { > > + dev_err(dev, "Invalid vendor/device id %04x/%04x\n", > > + vendor, device); > > + return -ENODEV; > > + } > > + > > + ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2); > > + if (ret) { > > + dev_err(&client->dev, "Failed to read firmware version\n"); > > + return ret; > > + } > > + > > + fwversion = (u16)buffer[0] << 8 | buffer[1]; > > + dev_info(dev, "ANX7688 firwmare version %02x.%02x\n", > > + buffer[0], buffer[1]); > > + > > + /* FW version >= 0.85 supports bandwidth/lane count registers */ > > + if (fwversion >= MINIMUM_FW_VERSION) { > > + anx7688->filter = true; > > + } else { > > + /* Warn, but not fail, for backwards compatibility. */ > > + dev_warn(dev, > > + "Old ANX7688 FW version (%02x.%02x), not filtering\n", > > + buffer[0], buffer[1]); > > + } > > + > > + anx7688->bridge.funcs = &anx7688_bridge_funcs; > > + drm_bridge_add(&anx7688->bridge); > > + > > + return 0; > > +} > > + > > +static int anx7688_i2c_remove(struct i2c_client *client) > > +{ > > + struct anx7688 *anx7688 = i2c_get_clientdata(client); > > + > > + drm_bridge_remove(&anx7688->bridge); > > + > > + return 0; > > +} > > + > > +static const struct i2c_device_id anx7688_id[] = { > > + { "anx7688", 0 }, > > + { /* sentinel */ } > > +}; > > + > > +MODULE_DEVICE_TABLE(i2c, anx7688_id); > > + > > +#if IS_ENABLED(CONFIG_OF) > > +static const struct of_device_id anx7688_match_table[] = { > > + { .compatible = "analogix,anx7688", }, > > + { /* sentinel */ }, > > +}; > > +MODULE_DEVICE_TABLE(of, anx7688_match_table); > > +#endif > > + > > +static struct i2c_driver anx7688_driver = { > > + .driver = { > > + .name = "anx7688", > > + .of_match_table = of_match_ptr(anx7688_match_table), > > + }, > > + .probe = anx7688_i2c_probe, > > + .remove = anx7688_i2c_remove, > > + .id_table = anx7688_id, > > +}; > > + > > +module_i2c_driver(anx7688_driver); > > + > > +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver"); > > +MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>"); > > +MODULE_LICENSE("GPL v2"); > > -- > Regards, > > Laurent Pinchart
On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang <hsinyi@chromium.org> wrote: > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart > <laurent.pinchart@ideasonboard.com> wrote: > > > > Hi Hsin-Yi and Nicolas, > > > > Thank you for the patch. > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > > > From: Nicolas Boichat <drinkcat@chromium.org> > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > > > that has an internal microcontroller. > > > > > > The only reason a Linux kernel driver is necessary is to reject > > > resolutions that require more bandwidth than what is available on > > > the DP side. DP bandwidth and lane count are reported by the bridge > > > via 2 registers on I2C. > > > > How about power, doesn't this chip have power supplies that potentially > > need to be controlled ? > > > Ideally we should add power supplies as well, but the power is > supplied by ec in mt8173 oak board. And we only have this board can > test this driver. If we add power supplies in driver we can't test it. To clarify a bit more, this is because this chip is actually a TCPC+mux+HDMI=>DP converter (https://www.analogix.com/en/products/convertersbridges/anx7688). In Chromebook architecture, TCPC+mux is controlled by the EC (including power and other control pins), and the only reason we need a driver for the HDMI=>DP converter is to get the number of lanes on the DP side and filter out resolutions. Also, the converter is on a different I2C address and it could almost be considered as a separate device. (of course we could write a kernel driver for the TCPC+mux but we'll leave that to others if there's ever a board that is built with the TCPC part connected to the AP) > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > > --- > > > drivers/gpu/drm/bridge/Kconfig | 9 + > > > drivers/gpu/drm/bridge/Makefile | 1 + > > > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > > > 3 files changed, 212 insertions(+) > > > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > > > index 34362976cd6f..1f3fc6bec842 100644 > > > --- a/drivers/gpu/drm/bridge/Kconfig > > > +++ b/drivers/gpu/drm/bridge/Kconfig > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > > > menu "Display Interface Bridges" > > > depends on DRM && DRM_BRIDGE > > > > > > +config DRM_ANALOGIX_ANX7688 > > > + tristate "Analogix ANX7688 bridge" > > > + select DRM_KMS_HELPER > > > + select REGMAP_I2C > > > + ---help--- > > > + ANX7688 is a transmitter to support DisplayPort over USB-C for > > > + smartphone and tablets. > > > + This driver only supports the HDMI to DP component of the chip. > > > + > > > config DRM_ANALOGIX_ANX78XX > > > tristate "Analogix ANX78XX bridge" > > > select DRM_KMS_HELPER > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > > > index 4934fcf5a6f8..7a1e0ec032e6 100644 > > > --- a/drivers/gpu/drm/bridge/Makefile > > > +++ b/drivers/gpu/drm/bridge/Makefile > > > @@ -1,4 +1,5 @@ > > > # SPDX-License-Identifier: GPL-2.0 > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > > > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > > > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > > > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > new file mode 100644 > > > index 000000000000..baaed48d6201 > > > --- /dev/null > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > @@ -0,0 +1,202 @@ > > > +// SPDX-License-Identifier: GPL-2.0-only > > > +/* > > > + * ANX7688 HDMI->DP bridge driver > > > + * > > > + * Copyright 2016 Google LLC > > > + */ > > > + > > > +#include <linux/i2c.h> > > > +#include <linux/module.h> > > > +#include <linux/regmap.h> > > > +#include <drm/drm_bridge.h> > > > + > > > +/* Register addresses */ > > > +#define VENDOR_ID_REG 0x00 > > > +#define DEVICE_ID_REG 0x02 > > > + > > > +#define FW_VERSION_REG 0x80 > > > + > > > +#define DP_BANDWIDTH_REG 0x85 > > > +#define DP_LANE_COUNT_REG 0x86 > > > > Are these registers defined by the ANX7688 hardware, or by the firmware > > running on the chip (and, I assume, developed by Google) ? > > > By firmware developed by ANX provided to Google. We asked for these registers to be added to ANX FW, and this is the FW that is used by all elm/hana Chromebooks (I have no idea about other ANX customers...). We have facilities to update the ANX FW from coreboot/depthcharge on Chromebooks, but that does not really matter: the factory FW of all MP Chromebooks does provide these registers. Thanks.
Hello Nicolas and Hsin-Yi, On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote: > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote: > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote: > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > > > > From: Nicolas Boichat <drinkcat@chromium.org> > > > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > > > > that has an internal microcontroller. > > > > > > > > The only reason a Linux kernel driver is necessary is to reject > > > > resolutions that require more bandwidth than what is available on > > > > the DP side. DP bandwidth and lane count are reported by the bridge > > > > via 2 registers on I2C. > > > > > > How about power, doesn't this chip have power supplies that potentially > > > need to be controlled ? > > > > > Ideally we should add power supplies as well, but the power is > > supplied by ec in mt8173 oak board. And we only have this board can > > test this driver. If we add power supplies in driver we can't test it. > > To clarify a bit more, this is because this chip is actually a > TCPC+mux+HDMI=>DP converter > (https://www.analogix.com/en/products/convertersbridges/anx7688). In > Chromebook architecture, TCPC+mux is controlled by the EC (including > power and other control pins), and the only reason we need a driver > for the HDMI=>DP converter is to get the number of lanes on the DP > side and filter out resolutions. Also, the converter is on a different > I2C address and it could almost be considered as a separate device. > > (of course we could write a kernel driver for the TCPC+mux but we'll > leave that to others if there's ever a board that is built with the > TCPC part connected to the AP) Is the mux the one that is handled through a gpio-mux driver in this series, or a different mux ? It would really, really help if you could show a block diagram of the related hardware (including the EC), as this is quite confusing. With every e-mail exchanged there's a bit more information that change my understanding of the issue, I can't really provide guidance without a full overview. > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > > > --- > > > > drivers/gpu/drm/bridge/Kconfig | 9 + > > > > drivers/gpu/drm/bridge/Makefile | 1 + > > > > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > > > > 3 files changed, 212 insertions(+) > > > > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > > > > index 34362976cd6f..1f3fc6bec842 100644 > > > > --- a/drivers/gpu/drm/bridge/Kconfig > > > > +++ b/drivers/gpu/drm/bridge/Kconfig > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > > > > menu "Display Interface Bridges" > > > > depends on DRM && DRM_BRIDGE > > > > > > > > +config DRM_ANALOGIX_ANX7688 > > > > + tristate "Analogix ANX7688 bridge" > > > > + select DRM_KMS_HELPER > > > > + select REGMAP_I2C > > > > + ---help--- > > > > + ANX7688 is a transmitter to support DisplayPort over USB-C for > > > > + smartphone and tablets. > > > > + This driver only supports the HDMI to DP component of the chip. > > > > + > > > > config DRM_ANALOGIX_ANX78XX > > > > tristate "Analogix ANX78XX bridge" > > > > select DRM_KMS_HELPER > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644 > > > > --- a/drivers/gpu/drm/bridge/Makefile > > > > +++ b/drivers/gpu/drm/bridge/Makefile > > > > @@ -1,4 +1,5 @@ > > > > # SPDX-License-Identifier: GPL-2.0 > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > > > > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > > > > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > > > > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > new file mode 100644 > > > > index 000000000000..baaed48d6201 > > > > --- /dev/null > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > @@ -0,0 +1,202 @@ > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > +/* > > > > + * ANX7688 HDMI->DP bridge driver > > > > + * > > > > + * Copyright 2016 Google LLC > > > > + */ > > > > + > > > > +#include <linux/i2c.h> > > > > +#include <linux/module.h> > > > > +#include <linux/regmap.h> > > > > +#include <drm/drm_bridge.h> > > > > + > > > > +/* Register addresses */ > > > > +#define VENDOR_ID_REG 0x00 > > > > +#define DEVICE_ID_REG 0x02 > > > > + > > > > +#define FW_VERSION_REG 0x80 > > > > + > > > > +#define DP_BANDWIDTH_REG 0x85 > > > > +#define DP_LANE_COUNT_REG 0x86 > > > > > > Are these registers defined by the ANX7688 hardware, or by the firmware > > > running on the chip (and, I assume, developed by Google) ? > > > > > By firmware developed by ANX provided to Google. > > We asked for these registers to be added to ANX FW, and this is the FW > that is used by all elm/hana Chromebooks (I have no idea about other > ANX customers...). We have facilities to update the ANX FW from > coreboot/depthcharge on Chromebooks, but that does not really matter: > the factory FW of all MP Chromebooks does provide these registers. So the driver is specific to Chromebooks, it doesn't support all ANX7688. Sweet :-(
Hi Laurent, On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart < laurent.pinchart@ideasonboard.com> wrote: > > Hello Nicolas and Hsin-Yi, > > On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote: > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote: > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote: > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > > > > > From: Nicolas Boichat <drinkcat@chromium.org> > > > > > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > > > > > that has an internal microcontroller. > > > > > > > > > > The only reason a Linux kernel driver is necessary is to reject > > > > > resolutions that require more bandwidth than what is available on > > > > > the DP side. DP bandwidth and lane count are reported by the bridge > > > > > via 2 registers on I2C. > > > > > > > > How about power, doesn't this chip have power supplies that potentially > > > > need to be controlled ? > > > > > > > Ideally we should add power supplies as well, but the power is > > > supplied by ec in mt8173 oak board. And we only have this board can > > > test this driver. If we add power supplies in driver we can't test it. > > > > To clarify a bit more, this is because this chip is actually a > > TCPC+mux+HDMI=>DP converter > > (https://www.analogix.com/en/products/convertersbridges/anx7688). In > > Chromebook architecture, TCPC+mux is controlled by the EC (including > > power and other control pins), and the only reason we need a driver > > for the HDMI=>DP converter is to get the number of lanes on the DP > > side and filter out resolutions. Also, the converter is on a different > > I2C address and it could almost be considered as a separate device. > > > > (of course we could write a kernel driver for the TCPC+mux but we'll > > leave that to others if there's ever a board that is built with the > > TCPC part connected to the AP) > > Is the mux the one that is handled through a gpio-mux driver in this > series, or a different mux ? It's a different mux: it's the usual USB-C mux that takes in USB 3.0 and DP (internally converted from HDMI), and decides which 2 lanes to use for each, and flip if necessary. This is all controlled by the EC (like on most other Chromebook), so this is transparent to the kernel, at least on Chromebooks. > It would really, really help if you could > show a block diagram of the related hardware (including the EC), as this > is quite confusing. With every e-mail exchanged there's a bit more > information that change my understanding of the issue, I can't really > provide guidance without a full overview. https://lkml.org/lkml/2019/12/9/548 that you drew is accurate for the display part of the problem. You can just add a USB3 connection to the above (there's also I2C interface to the EC of course to control the TCPC/mux aspect of it, but that's on different I2C addresses). +-----------+ +---------+ +------+ /--> | HDMI | | MT8173 | HDMI | -->| --/ | Connector | | HDMI | ------> |--/ | +-----------+ | Encoder | | ->| --\ +-----------+ +-----------+ +---------+ +------+ \--> | ANX7688 | ---> | USB-C | | Bridge | | Connector | USB3--> | + mux | | | +-----------+ +-----------+ ^ The ANX7688 brige could _almost_ work driverless (and it does already), the _only_ thing that the driver is doing is filtering out impossible resolution based on DP (over USB-C) number of lanes and bandwidth. > > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > > > > --- > > > > > drivers/gpu/drm/bridge/Kconfig | 9 + > > > > > drivers/gpu/drm/bridge/Makefile | 1 + > > > > > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > > > > > 3 files changed, 212 insertions(+) > > > > > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > > > > > index 34362976cd6f..1f3fc6bec842 100644 > > > > > --- a/drivers/gpu/drm/bridge/Kconfig > > > > > +++ b/drivers/gpu/drm/bridge/Kconfig > > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > > > > > menu "Display Interface Bridges" > > > > > depends on DRM && DRM_BRIDGE > > > > > > > > > > +config DRM_ANALOGIX_ANX7688 > > > > > + tristate "Analogix ANX7688 bridge" > > > > > + select DRM_KMS_HELPER > > > > > + select REGMAP_I2C > > > > > + ---help--- > > > > > + ANX7688 is a transmitter to support DisplayPort over USB-C for > > > > > + smartphone and tablets. > > > > > + This driver only supports the HDMI to DP component of the chip. > > > > > + > > > > > config DRM_ANALOGIX_ANX78XX > > > > > tristate "Analogix ANX78XX bridge" > > > > > select DRM_KMS_HELPER > > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644 > > > > > --- a/drivers/gpu/drm/bridge/Makefile > > > > > +++ b/drivers/gpu/drm/bridge/Makefile > > > > > @@ -1,4 +1,5 @@ > > > > > # SPDX-License-Identifier: GPL-2.0 > > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > > > > > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > > > > > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > > > > > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > new file mode 100644 > > > > > index 000000000000..baaed48d6201 > > > > > --- /dev/null > > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > @@ -0,0 +1,202 @@ > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > +/* > > > > > + * ANX7688 HDMI->DP bridge driver > > > > > + * > > > > > + * Copyright 2016 Google LLC > > > > > + */ > > > > > + > > > > > +#include <linux/i2c.h> > > > > > +#include <linux/module.h> > > > > > +#include <linux/regmap.h> > > > > > +#include <drm/drm_bridge.h> > > > > > + > > > > > +/* Register addresses */ > > > > > +#define VENDOR_ID_REG 0x00 > > > > > +#define DEVICE_ID_REG 0x02 > > > > > + > > > > > +#define FW_VERSION_REG 0x80 > > > > > + > > > > > +#define DP_BANDWIDTH_REG 0x85 > > > > > +#define DP_LANE_COUNT_REG 0x86 > > > > > > > > Are these registers defined by the ANX7688 hardware, or by the firmware > > > > running on the chip (and, I assume, developed by Google) ? > > > > > > > By firmware developed by ANX provided to Google. > > > > We asked for these registers to be added to ANX FW, and this is the FW > > that is used by all elm/hana Chromebooks (I have no idea about other > > ANX customers...). We have facilities to update the ANX FW from > > coreboot/depthcharge on Chromebooks, but that does not really matter: > > the factory FW of all MP Chromebooks does provide these registers. > > So the driver is specific to Chromebooks, it doesn't support all > ANX7688. Sweet :-( FWIW, this is a 3+ year old part, so it appears that nobody else cares anyway? Also, this driver is only required to implement the mode filtering, which, possibly, is only supported by the Google version of the FW (I have no idea what other customers ANX has for this part). > -- > Regards, > > Laurent Pinchart
(Brilliant, I managed to accidentally send the email below, and send it as HTML, sorry about that... ASCII art in gmail is hard ,-( Take 2:) Hi Laurent, > On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > > > > Hello Nicolas and Hsin-Yi, > > > > On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote: > > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote: > > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote: > > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > > > > > > From: Nicolas Boichat <drinkcat@chromium.org> > > > > > > > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > > > > > > that has an internal microcontroller. > > > > > > > > > > > > The only reason a Linux kernel driver is necessary is to reject > > > > > > resolutions that require more bandwidth than what is available on > > > > > > the DP side. DP bandwidth and lane count are reported by the bridge > > > > > > via 2 registers on I2C. > > > > > > > > > > How about power, doesn't this chip have power supplies that potentially > > > > > need to be controlled ? > > > > > > > > > Ideally we should add power supplies as well, but the power is > > > > supplied by ec in mt8173 oak board. And we only have this board can > > > > test this driver. If we add power supplies in driver we can't test it. > > > > > > To clarify a bit more, this is because this chip is actually a > > > TCPC+mux+HDMI=>DP converter > > > (https://www.analogix.com/en/products/convertersbridges/anx7688). In > > > Chromebook architecture, TCPC+mux is controlled by the EC (including > > > power and other control pins), and the only reason we need a driver > > > for the HDMI=>DP converter is to get the number of lanes on the DP > > > side and filter out resolutions. Also, the converter is on a different > > > I2C address and it could almost be considered as a separate device. > > > > > > (of course we could write a kernel driver for the TCPC+mux but we'll > > > leave that to others if there's ever a board that is built with the > > > TCPC part connected to the AP) > > > > Is the mux the one that is handled through a gpio-mux driver in this > > series, or a different mux ? > It's a different mux: it's the usual USB-C mux that takes in USB 3.0 and DP (internally converted from HDMI), and decides which 2 lanes to use for each (4 lanes in total, but DP can only take 2 with this converter), and flip if necessary. This is all controlled by the EC (like on most other Chromebooks), so this is transparent to the kernel on this hardware. > > It would really, really help if you could > > show a block diagram of the related hardware (including the EC), as this > > is quite confusing. With every e-mail exchanged there's a bit more > > information that change my understanding of the issue, I can't really > > provide guidance without a full overview. https://lkml.org/lkml/2019/12/9/548 that you drew is accurate for the display part of the problem. You can just add a USB3 connection to the above (there's also I2C interface to the EC of course to control the TCPC/mux aspect of it, but that's on different I2C addresses). Something like this: +-----------+ +---------+ +------+ /--> | HDMI | | MT8173 | HDMI | -->| --/ | Connector | | HDMI | ------> |--/ | +-----------+ | Encoder | | ->| --\ +-----------+ +-----------+ +---------+ +------+ \--> | ANX7688 | ---> | USB-C | | Bridge | | Connector | USB3--> | + mux | | | +-----------+ +-----------+ ^ ^ (I2C) | | (I2C) MT8173 (DP lane count/bw readback) -- + + -- EC (TCPC+mux control) Power is also fully controlled by the EC. (the product brief has a good diagram of the internals of the ANX7688: https://www.analogix.com/en/system/files/AA-002281-PB-6-ANX7688_Product_Brief.pdf) The ANX7688 bridge could _almost_ work driverless (and it does already), the _only_ thing that the driver is doing is filtering out impossible resolution based on DP (over USB-C) number of lanes and bandwidth. This is required to support, for example, old monitors that may only do RBR over DP (so we can't drive the full resolution over 2 DP lanes, we'd need 4 lanes, and we need to filter out the higher resolution modes). > > > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > > > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > > > > > --- > > > > > > drivers/gpu/drm/bridge/Kconfig | 9 + > > > > > > drivers/gpu/drm/bridge/Makefile | 1 + > > > > > > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > > > > > > 3 files changed, 212 insertions(+) > > > > > > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > > > > > > index 34362976cd6f..1f3fc6bec842 100644 > > > > > > --- a/drivers/gpu/drm/bridge/Kconfig > > > > > > +++ b/drivers/gpu/drm/bridge/Kconfig > > > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > > > > > > menu "Display Interface Bridges" > > > > > > depends on DRM && DRM_BRIDGE > > > > > > > > > > > > +config DRM_ANALOGIX_ANX7688 > > > > > > + tristate "Analogix ANX7688 bridge" > > > > > > + select DRM_KMS_HELPER > > > > > > + select REGMAP_I2C > > > > > > + ---help--- > > > > > > + ANX7688 is a transmitter to support DisplayPort over USB-C for > > > > > > + smartphone and tablets. > > > > > > + This driver only supports the HDMI to DP component of the chip. > > > > > > + > > > > > > config DRM_ANALOGIX_ANX78XX > > > > > > tristate "Analogix ANX78XX bridge" > > > > > > select DRM_KMS_HELPER > > > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > > > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644 > > > > > > --- a/drivers/gpu/drm/bridge/Makefile > > > > > > +++ b/drivers/gpu/drm/bridge/Makefile > > > > > > @@ -1,4 +1,5 @@ > > > > > > # SPDX-License-Identifier: GPL-2.0 > > > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > > > > > > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > > > > > > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > > > > > > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > new file mode 100644 > > > > > > index 000000000000..baaed48d6201 > > > > > > --- /dev/null > > > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > @@ -0,0 +1,202 @@ > > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > > +/* > > > > > > + * ANX7688 HDMI->DP bridge driver > > > > > > + * > > > > > > + * Copyright 2016 Google LLC > > > > > > + */ > > > > > > + > > > > > > +#include <linux/i2c.h> > > > > > > +#include <linux/module.h> > > > > > > +#include <linux/regmap.h> > > > > > > +#include <drm/drm_bridge.h> > > > > > > + > > > > > > +/* Register addresses */ > > > > > > +#define VENDOR_ID_REG 0x00 > > > > > > +#define DEVICE_ID_REG 0x02 > > > > > > + > > > > > > +#define FW_VERSION_REG 0x80 > > > > > > + > > > > > > +#define DP_BANDWIDTH_REG 0x85 > > > > > > +#define DP_LANE_COUNT_REG 0x86 > > > > > > > > > > Are these registers defined by the ANX7688 hardware, or by the firmware > > > > > running on the chip (and, I assume, developed by Google) ? > > > > > > > > > By firmware developed by ANX provided to Google. > > > > > > We asked for these registers to be added to ANX FW, and this is the FW > > > that is used by all elm/hana Chromebooks (I have no idea about other > > > ANX customers...). We have facilities to update the ANX FW from > > > coreboot/depthcharge on Chromebooks, but that does not really matter: > > > the factory FW of all MP Chromebooks does provide these registers. > > > > So the driver is specific to Chromebooks, it doesn't support all > > ANX7688. Sweet :-( > FWIW, this is a 3+ year old part, so it appears that nobody else cares anyway? Also, this driver is only required to implement the mode filtering, which, possibly, is only supported by the Google version of the FW (I have no idea what other customers ANX has for this part, if they care about this problem, and if so, how they solve it).
Hi Nicolas, On Tue, Dec 17, 2019 at 08:40:51AM +0800, Nicolas Boichat wrote: > (Brilliant, I managed to accidentally send the email below, and send > it as HTML, sorry about that... ASCII art in gmail is hard ,-( No worries. I have been told it's indeed painful. > Take 2:) > > Hi Laurent, > > > On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart wrote: > > > On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote: > > > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote: > > > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote: > > > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > > > > > > > From: Nicolas Boichat <drinkcat@chromium.org> > > > > > > > > > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > > > > > > > that has an internal microcontroller. > > > > > > > > > > > > > > The only reason a Linux kernel driver is necessary is to reject > > > > > > > resolutions that require more bandwidth than what is available on > > > > > > > the DP side. DP bandwidth and lane count are reported by the bridge > > > > > > > via 2 registers on I2C. > > > > > > > > > > > > How about power, doesn't this chip have power supplies that potentially > > > > > > need to be controlled ? > > > > > > > > > > > Ideally we should add power supplies as well, but the power is > > > > > supplied by ec in mt8173 oak board. And we only have this board can > > > > > test this driver. If we add power supplies in driver we can't test it. > > > > > > > > To clarify a bit more, this is because this chip is actually a > > > > TCPC+mux+HDMI=>DP converter > > > > (https://www.analogix.com/en/products/convertersbridges/anx7688). In > > > > Chromebook architecture, TCPC+mux is controlled by the EC (including > > > > power and other control pins), and the only reason we need a driver > > > > for the HDMI=>DP converter is to get the number of lanes on the DP > > > > side and filter out resolutions. Also, the converter is on a different > > > > I2C address and it could almost be considered as a separate device. > > > > > > > > (of course we could write a kernel driver for the TCPC+mux but we'll > > > > leave that to others if there's ever a board that is built with the > > > > TCPC part connected to the AP) > > > > > > Is the mux the one that is handled through a gpio-mux driver in this > > > series, or a different mux ? > > > > It's a different mux: it's the usual USB-C mux that takes in USB 3.0 > and DP (internally converted from HDMI), and decides which 2 lanes to > use for each (4 lanes in total, but DP can only take 2 with this > converter), and flip if necessary. This is all controlled by the EC > (like on most other Chromebooks), so this is transparent to the kernel > on this hardware. > > > > It would really, really help if you could > > > show a block diagram of the related hardware (including the EC), as this > > > is quite confusing. With every e-mail exchanged there's a bit more > > > information that change my understanding of the issue, I can't really > > > provide guidance without a full overview. > > https://lkml.org/lkml/2019/12/9/548 that you drew is accurate for the > display part of the problem. > > You can just add a USB3 connection to the above (there's also I2C > interface to the EC of course to control the TCPC/mux aspect of it, > but that's on different I2C addresses). Something like this: > > +-----------+ > +---------+ +------+ /--> | HDMI | > | MT8173 | HDMI | -->| --/ | Connector | > | HDMI | ------> |--/ | +-----------+ > | Encoder | | ->| --\ +-----------+ +-----------+ > +---------+ +------+ \--> | ANX7688 | ---> | USB-C | > | Bridge | | Connector | > USB3--> | + mux | | | > +-----------+ +-----------+ > ^ ^ > (I2C) | | (I2C) > MT8173 (DP lane count/bw readback) -- + + -- EC (TCPC+mux control) > > Power is also fully controlled by the EC. Could I ask you to also explain how the HDMI mux is controlled, and where the HPD-related signals for the HDMI connector and USB-C connector are routed to ? > (the product brief has a good diagram of the internals of the ANX7688: > https://www.analogix.com/en/system/files/AA-002281-PB-6-ANX7688_Product_Brief.pdf) > > The ANX7688 bridge could _almost_ work driverless (and it does > already), the _only_ thing that the driver is doing is filtering out > impossible resolution based on DP (over USB-C) number of lanes and > bandwidth. This is required to support, for example, old monitors that > may only do RBR over DP (so we can't drive the full resolution over 2 > DP lanes, we'd need 4 lanes, and we need to filter out the higher > resolution modes). > > > > > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > > > > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > > > > > > --- > > > > > > > drivers/gpu/drm/bridge/Kconfig | 9 + > > > > > > > drivers/gpu/drm/bridge/Makefile | 1 + > > > > > > > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > > > > > > > 3 files changed, 212 insertions(+) > > > > > > > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > > > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > > > > > > > index 34362976cd6f..1f3fc6bec842 100644 > > > > > > > --- a/drivers/gpu/drm/bridge/Kconfig > > > > > > > +++ b/drivers/gpu/drm/bridge/Kconfig > > > > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > > > > > > > menu "Display Interface Bridges" > > > > > > > depends on DRM && DRM_BRIDGE > > > > > > > > > > > > > > +config DRM_ANALOGIX_ANX7688 > > > > > > > + tristate "Analogix ANX7688 bridge" > > > > > > > + select DRM_KMS_HELPER > > > > > > > + select REGMAP_I2C > > > > > > > + ---help--- > > > > > > > + ANX7688 is a transmitter to support DisplayPort over USB-C for > > > > > > > + smartphone and tablets. > > > > > > > + This driver only supports the HDMI to DP component of the chip. > > > > > > > + > > > > > > > config DRM_ANALOGIX_ANX78XX > > > > > > > tristate "Analogix ANX78XX bridge" > > > > > > > select DRM_KMS_HELPER > > > > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > > > > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644 > > > > > > > --- a/drivers/gpu/drm/bridge/Makefile > > > > > > > +++ b/drivers/gpu/drm/bridge/Makefile > > > > > > > @@ -1,4 +1,5 @@ > > > > > > > # SPDX-License-Identifier: GPL-2.0 > > > > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > > > > > > > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > > > > > > > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > > > > > > > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > new file mode 100644 > > > > > > > index 000000000000..baaed48d6201 > > > > > > > --- /dev/null > > > > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > @@ -0,0 +1,202 @@ > > > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > > > +/* > > > > > > > + * ANX7688 HDMI->DP bridge driver > > > > > > > + * > > > > > > > + * Copyright 2016 Google LLC > > > > > > > + */ > > > > > > > + > > > > > > > +#include <linux/i2c.h> > > > > > > > +#include <linux/module.h> > > > > > > > +#include <linux/regmap.h> > > > > > > > +#include <drm/drm_bridge.h> > > > > > > > + > > > > > > > +/* Register addresses */ > > > > > > > +#define VENDOR_ID_REG 0x00 > > > > > > > +#define DEVICE_ID_REG 0x02 > > > > > > > + > > > > > > > +#define FW_VERSION_REG 0x80 > > > > > > > + > > > > > > > +#define DP_BANDWIDTH_REG 0x85 > > > > > > > +#define DP_LANE_COUNT_REG 0x86 > > > > > > > > > > > > Are these registers defined by the ANX7688 hardware, or by the firmware > > > > > > running on the chip (and, I assume, developed by Google) ? > > > > > > > > > > > By firmware developed by ANX provided to Google. > > > > > > > > We asked for these registers to be added to ANX FW, and this is the FW > > > > that is used by all elm/hana Chromebooks (I have no idea about other > > > > ANX customers...). We have facilities to update the ANX FW from > > > > coreboot/depthcharge on Chromebooks, but that does not really matter: > > > > the factory FW of all MP Chromebooks does provide these registers. > > > > > > So the driver is specific to Chromebooks, it doesn't support all > > > ANX7688. Sweet :-( > > FWIW, this is a 3+ year old part, so it appears that nobody else cares anyway? That's good news :-) > Also, this driver is only required to implement the mode filtering, > which, possibly, is only supported by the Google version of the FW (I > have no idea what other customers ANX has for this part, if they care > about this problem, and if so, how they solve it).
Hi, On Tue, Dec 17, 2019 at 8:52 AM Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > > Hi Nicolas, > > On Tue, Dec 17, 2019 at 08:40:51AM +0800, Nicolas Boichat wrote: > > (Brilliant, I managed to accidentally send the email below, and send > > it as HTML, sorry about that... ASCII art in gmail is hard ,-( > > No worries. I have been told it's indeed painful. > > > Take 2:) > > > > Hi Laurent, > > > > > On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart wrote: > > > > On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote: > > > > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote: > > > > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote: > > > > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote: > > > > > > > > From: Nicolas Boichat <drinkcat@chromium.org> > > > > > > > > > > > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller), > > > > > > > > that has an internal microcontroller. > > > > > > > > > > > > > > > > The only reason a Linux kernel driver is necessary is to reject > > > > > > > > resolutions that require more bandwidth than what is available on > > > > > > > > the DP side. DP bandwidth and lane count are reported by the bridge > > > > > > > > via 2 registers on I2C. > > > > > > > > > > > > > > How about power, doesn't this chip have power supplies that potentially > > > > > > > need to be controlled ? > > > > > > > > > > > > > Ideally we should add power supplies as well, but the power is > > > > > > supplied by ec in mt8173 oak board. And we only have this board can > > > > > > test this driver. If we add power supplies in driver we can't test it. > > > > > > > > > > To clarify a bit more, this is because this chip is actually a > > > > > TCPC+mux+HDMI=>DP converter > > > > > (https://www.analogix.com/en/products/convertersbridges/anx7688). In > > > > > Chromebook architecture, TCPC+mux is controlled by the EC (including > > > > > power and other control pins), and the only reason we need a driver > > > > > for the HDMI=>DP converter is to get the number of lanes on the DP > > > > > side and filter out resolutions. Also, the converter is on a different > > > > > I2C address and it could almost be considered as a separate device. > > > > > > > > > > (of course we could write a kernel driver for the TCPC+mux but we'll > > > > > leave that to others if there's ever a board that is built with the > > > > > TCPC part connected to the AP) > > > > > > > > Is the mux the one that is handled through a gpio-mux driver in this > > > > series, or a different mux ? > > > > > > > It's a different mux: it's the usual USB-C mux that takes in USB 3.0 > > and DP (internally converted from HDMI), and decides which 2 lanes to > > use for each (4 lanes in total, but DP can only take 2 with this > > converter), and flip if necessary. This is all controlled by the EC > > (like on most other Chromebooks), so this is transparent to the kernel > > on this hardware. > > > > > > It would really, really help if you could > > > > show a block diagram of the related hardware (including the EC), as this > > > > is quite confusing. With every e-mail exchanged there's a bit more > > > > information that change my understanding of the issue, I can't really > > > > provide guidance without a full overview. > > > > https://lkml.org/lkml/2019/12/9/548 that you drew is accurate for the > > display part of the problem. > > > > You can just add a USB3 connection to the above (there's also I2C > > interface to the EC of course to control the TCPC/mux aspect of it, > > but that's on different I2C addresses). Something like this: > > > > +-----------+ > > +---------+ +------+ /--> | HDMI | > > | MT8173 | HDMI | -->| --/ | Connector | > > | HDMI | ------> |--/ | +-----------+ > > | Encoder | | ->| --\ +-----------+ +-----------+ > > +---------+ +------+ \--> | ANX7688 | ---> | USB-C | > > | Bridge | | Connector | > > USB3--> | + mux | | | > > +-----------+ +-----------+ > > ^ ^ > > (I2C) | | (I2C) > > MT8173 (DP lane count/bw readback) -- + + -- EC (TCPC+mux control) > > > > Power is also fully controlled by the EC. > > Could I ask you to also explain how the HDMI mux is controlled, Priority to HDMI. If the HDMI is connected (looking at its HPD signal), then the HDMI signals are routed to HDMI connector. Else HDMI is routed to ANX7688/USB-C. > and > where the HPD-related signals for the HDMI connector and USB-C connector > are routed to ? HPD is also muxed by the mux, between the 2 inputs. (http://www.ti.com/lit/ds/symlink/ts3dv642.pdf, if you are curious, 9.2.3 is basically how things are wired, with one of the HPD_A/B connected to SEL2) My memory is fading away now, but I think at some point we considered having hardware send an HPD pulse when the input changes, but decided against it (for cost/complexity reasons). So that means that if both HDMI and USB-C monitors are plugged, and you unplug HDMI, the mux would switch but you would not get an HPD pulse. That's one of the reason we need to react to edges on the mux SEL signal to ask the kernel to re-read the EDID (that's in the other driver that Hsin-Yi is trying (again) to upstream in this series). (IIRC, that's also why HDMI HPD pulse work if both connectors are plugged, we get the edge on the SEL signal an re-read the EDID). Thanks. > > (the product brief has a good diagram of the internals of the ANX7688: > > https://www.analogix.com/en/system/files/AA-002281-PB-6-ANX7688_Product_Brief.pdf) > > > > The ANX7688 bridge could _almost_ work driverless (and it does > > already), the _only_ thing that the driver is doing is filtering out > > impossible resolution based on DP (over USB-C) number of lanes and > > bandwidth. This is required to support, for example, old monitors that > > may only do RBR over DP (so we can't drive the full resolution over 2 > > DP lanes, we'd need 4 lanes, and we need to filter out the higher > > resolution modes). > > > > > > > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > > > > > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > > > > > > > > --- > > > > > > > > drivers/gpu/drm/bridge/Kconfig | 9 + > > > > > > > > drivers/gpu/drm/bridge/Makefile | 1 + > > > > > > > > drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ > > > > > > > > 3 files changed, 212 insertions(+) > > > > > > > > create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > > > > > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > > > > > > > > index 34362976cd6f..1f3fc6bec842 100644 > > > > > > > > --- a/drivers/gpu/drm/bridge/Kconfig > > > > > > > > +++ b/drivers/gpu/drm/bridge/Kconfig > > > > > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE > > > > > > > > menu "Display Interface Bridges" > > > > > > > > depends on DRM && DRM_BRIDGE > > > > > > > > > > > > > > > > +config DRM_ANALOGIX_ANX7688 > > > > > > > > + tristate "Analogix ANX7688 bridge" > > > > > > > > + select DRM_KMS_HELPER > > > > > > > > + select REGMAP_I2C > > > > > > > > + ---help--- > > > > > > > > + ANX7688 is a transmitter to support DisplayPort over USB-C for > > > > > > > > + smartphone and tablets. > > > > > > > > + This driver only supports the HDMI to DP component of the chip. > > > > > > > > + > > > > > > > > config DRM_ANALOGIX_ANX78XX > > > > > > > > tristate "Analogix ANX78XX bridge" > > > > > > > > select DRM_KMS_HELPER > > > > > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile > > > > > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644 > > > > > > > > --- a/drivers/gpu/drm/bridge/Makefile > > > > > > > > +++ b/drivers/gpu/drm/bridge/Makefile > > > > > > > > @@ -1,4 +1,5 @@ > > > > > > > > # SPDX-License-Identifier: GPL-2.0 > > > > > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o > > > > > > > > obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o > > > > > > > > obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o > > > > > > > > obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o > > > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > > new file mode 100644 > > > > > > > > index 000000000000..baaed48d6201 > > > > > > > > --- /dev/null > > > > > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c > > > > > > > > @@ -0,0 +1,202 @@ > > > > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > > > > +/* > > > > > > > > + * ANX7688 HDMI->DP bridge driver > > > > > > > > + * > > > > > > > > + * Copyright 2016 Google LLC > > > > > > > > + */ > > > > > > > > + > > > > > > > > +#include <linux/i2c.h> > > > > > > > > +#include <linux/module.h> > > > > > > > > +#include <linux/regmap.h> > > > > > > > > +#include <drm/drm_bridge.h> > > > > > > > > + > > > > > > > > +/* Register addresses */ > > > > > > > > +#define VENDOR_ID_REG 0x00 > > > > > > > > +#define DEVICE_ID_REG 0x02 > > > > > > > > + > > > > > > > > +#define FW_VERSION_REG 0x80 > > > > > > > > + > > > > > > > > +#define DP_BANDWIDTH_REG 0x85 > > > > > > > > +#define DP_LANE_COUNT_REG 0x86 > > > > > > > > > > > > > > Are these registers defined by the ANX7688 hardware, or by the firmware > > > > > > > running on the chip (and, I assume, developed by Google) ? > > > > > > > > > > > > > By firmware developed by ANX provided to Google. > > > > > > > > > > We asked for these registers to be added to ANX FW, and this is the FW > > > > > that is used by all elm/hana Chromebooks (I have no idea about other > > > > > ANX customers...). We have facilities to update the ANX FW from > > > > > coreboot/depthcharge on Chromebooks, but that does not really matter: > > > > > the factory FW of all MP Chromebooks does provide these registers. > > > > > > > > So the driver is specific to Chromebooks, it doesn't support all > > > > ANX7688. Sweet :-( > > > > FWIW, this is a 3+ year old part, so it appears that nobody else cares anyway? > > That's good news :-) > > > Also, this driver is only required to implement the mode filtering, > > which, possibly, is only supported by the Google version of the FW (I > > have no idea what other customers ANX has for this part, if they care > > about this problem, and if so, how they solve it). > > -- > Regards, > > Laurent Pinchart
diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 34362976cd6f..1f3fc6bec842 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE menu "Display Interface Bridges" depends on DRM && DRM_BRIDGE +config DRM_ANALOGIX_ANX7688 + tristate "Analogix ANX7688 bridge" + select DRM_KMS_HELPER + select REGMAP_I2C + ---help--- + ANX7688 is a transmitter to support DisplayPort over USB-C for + smartphone and tablets. + This driver only supports the HDMI to DP component of the chip. + config DRM_ANALOGIX_ANX78XX tristate "Analogix ANX78XX bridge" select DRM_KMS_HELPER diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 4934fcf5a6f8..7a1e0ec032e6 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c new file mode 100644 index 000000000000..baaed48d6201 --- /dev/null +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * ANX7688 HDMI->DP bridge driver + * + * Copyright 2016 Google LLC + */ + +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/regmap.h> +#include <drm/drm_bridge.h> + +/* Register addresses */ +#define VENDOR_ID_REG 0x00 +#define DEVICE_ID_REG 0x02 + +#define FW_VERSION_REG 0x80 + +#define DP_BANDWIDTH_REG 0x85 +#define DP_LANE_COUNT_REG 0x86 + +#define VENDOR_ID 0x1f29 +#define DEVICE_ID 0x7688 + +/* First supported firmware version (0.85) */ +#define MINIMUM_FW_VERSION 0x0085 + +struct anx7688 { + struct drm_bridge bridge; + struct i2c_client *client; + struct regmap *regmap; + + bool filter; +}; + +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge) +{ + return container_of(bridge, struct anx7688, bridge); +} + +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct anx7688 *anx7688 = bridge_to_anx7688(bridge); + u8 regs[2]; + u8 dpbw, lanecount; + int totalbw, requiredbw; + int ret; + + if (!anx7688->filter) + return true; + + /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */ + ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2); + if (ret < 0) { + dev_err(&anx7688->client->dev, + "Failed to read bandwidth/lane count\n"); + return false; + } + dpbw = regs[0]; + lanecount = regs[1]; + + /* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */ + if (dpbw > 0x19 || lanecount > 2) { + dev_err(&anx7688->client->dev, + "Invalid bandwidth/lane count (%02x/%d)\n", + dpbw, lanecount); + return false; + } + + /* Compute available bandwidth (kHz) */ + totalbw = dpbw * lanecount * 270000 * 8 / 10; + + /* Required bandwidth (8 bpc, kHz) */ + requiredbw = mode->clock * 8 * 3; + + dev_dbg(&anx7688->client->dev, + "DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n", + totalbw, dpbw, lanecount, requiredbw); + + if (totalbw == 0) { + dev_warn(&anx7688->client->dev, + "Bandwidth/lane count are 0, not rejecting modes\n"); + return true; + } + + return totalbw >= requiredbw; +} + +static const struct drm_bridge_funcs anx7688_bridge_funcs = { + .mode_fixup = anx7688_bridge_mode_fixup, +}; + +static const struct regmap_config anx7688_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int anx7688_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct anx7688 *anx7688; + struct device *dev = &client->dev; + int ret; + u8 buffer[4]; + u16 vendor, device, fwversion; + + anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL); + if (!anx7688) + return -ENOMEM; + +#if IS_ENABLED(CONFIG_OF) + anx7688->bridge.of_node = client->dev.of_node; +#endif + + anx7688->client = client; + i2c_set_clientdata(client, anx7688); + + anx7688->regmap = + devm_regmap_init_i2c(client, &anx7688_regmap_config); + + /* Read both vendor and device id (4 bytes). */ + ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4); + if (ret) { + dev_err(dev, "Failed to read chip vendor/device id\n"); + return ret; + } + + vendor = (u16)buffer[1] << 8 | buffer[0]; + device = (u16)buffer[3] << 8 | buffer[2]; + if (vendor != VENDOR_ID || device != DEVICE_ID) { + dev_err(dev, "Invalid vendor/device id %04x/%04x\n", + vendor, device); + return -ENODEV; + } + + ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2); + if (ret) { + dev_err(&client->dev, "Failed to read firmware version\n"); + return ret; + } + + fwversion = (u16)buffer[0] << 8 | buffer[1]; + dev_info(dev, "ANX7688 firwmare version %02x.%02x\n", + buffer[0], buffer[1]); + + /* FW version >= 0.85 supports bandwidth/lane count registers */ + if (fwversion >= MINIMUM_FW_VERSION) { + anx7688->filter = true; + } else { + /* Warn, but not fail, for backwards compatibility. */ + dev_warn(dev, + "Old ANX7688 FW version (%02x.%02x), not filtering\n", + buffer[0], buffer[1]); + } + + anx7688->bridge.funcs = &anx7688_bridge_funcs; + drm_bridge_add(&anx7688->bridge); + + return 0; +} + +static int anx7688_i2c_remove(struct i2c_client *client) +{ + struct anx7688 *anx7688 = i2c_get_clientdata(client); + + drm_bridge_remove(&anx7688->bridge); + + return 0; +} + +static const struct i2c_device_id anx7688_id[] = { + { "anx7688", 0 }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(i2c, anx7688_id); + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id anx7688_match_table[] = { + { .compatible = "analogix,anx7688", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, anx7688_match_table); +#endif + +static struct i2c_driver anx7688_driver = { + .driver = { + .name = "anx7688", + .of_match_table = of_match_ptr(anx7688_match_table), + }, + .probe = anx7688_i2c_probe, + .remove = anx7688_i2c_remove, + .id_table = anx7688_id, +}; + +module_i2c_driver(anx7688_driver); + +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver"); +MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>"); +MODULE_LICENSE("GPL v2");