| Message ID | 20191216153809.105463-8-Jonathan.Cameron@huawei.com (mailing list archive) |
|---|---|
| State | Deferred, archived |
| Headers | show |
| Series | ACPI: Support Generic Initiator proximity domains | expand |
Le 16/12/2019 à 16:38, Jonathan Cameron a écrit : > Try to make minimal changes to the document which already describes > access class 0 in a generic fashion (including IO initiatiors that > are not CPUs). > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > Documentation/admin-guide/mm/numaperf.rst | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/admin-guide/mm/numaperf.rst b/Documentation/admin-guide/mm/numaperf.rst > index a80c3c37226e..327c0d72692d 100644 > --- a/Documentation/admin-guide/mm/numaperf.rst > +++ b/Documentation/admin-guide/mm/numaperf.rst > @@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other > linked initiator nodes. Each target within an initiator's access class, > though, do not necessarily perform the same as each other. > > +The access class "1" is used to allow differentiation between initiators > +that are CPUs and hence suitable for generic task scheduling, and > +IO initiators such as GPUs and CPUs. Unlike access class 0, only > +nodes containing CPUs are considered. > + > ================ > NUMA Performance > ================ > @@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds. > The values reported here correspond to the rated latency and bandwidth > for the platform. > > +Access class 0, takes the same form, but only includes values for CPU to > +memory activity. Shouldn't this be "class 1" here? Both hunks look contradictory to me. Brice
On Wed, 18 Dec 2019 12:34:34 +0100 Brice Goglin <brice.goglin@gmail.com> wrote: > Le 16/12/2019 à 16:38, Jonathan Cameron a écrit : > > Try to make minimal changes to the document which already describes > > access class 0 in a generic fashion (including IO initiatiors that > > are not CPUs). > > > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > --- > > Documentation/admin-guide/mm/numaperf.rst | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/Documentation/admin-guide/mm/numaperf.rst b/Documentation/admin-guide/mm/numaperf.rst > > index a80c3c37226e..327c0d72692d 100644 > > --- a/Documentation/admin-guide/mm/numaperf.rst > > +++ b/Documentation/admin-guide/mm/numaperf.rst > > @@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other > > linked initiator nodes. Each target within an initiator's access class, > > though, do not necessarily perform the same as each other. > > > > +The access class "1" is used to allow differentiation between initiators > > +that are CPUs and hence suitable for generic task scheduling, and > > +IO initiators such as GPUs and CPUs. Unlike access class 0, only > > +nodes containing CPUs are considered. > > + > > ================ > > NUMA Performance > > ================ > > @@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds. > > The values reported here correspond to the rated latency and bandwidth > > for the platform. > > > > +Access class 0, takes the same form, but only includes values for CPU to > > +memory activity. > > > Shouldn't this be "class 1" here? > Good point. Jonathan > Both hunks look contradictory to me. > > Brice > >
diff --git a/Documentation/admin-guide/mm/numaperf.rst b/Documentation/admin-guide/mm/numaperf.rst index a80c3c37226e..327c0d72692d 100644 --- a/Documentation/admin-guide/mm/numaperf.rst +++ b/Documentation/admin-guide/mm/numaperf.rst @@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other linked initiator nodes. Each target within an initiator's access class, though, do not necessarily perform the same as each other. +The access class "1" is used to allow differentiation between initiators +that are CPUs and hence suitable for generic task scheduling, and +IO initiators such as GPUs and CPUs. Unlike access class 0, only +nodes containing CPUs are considered. + ================ NUMA Performance ================ @@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds. The values reported here correspond to the rated latency and bandwidth for the platform. +Access class 0, takes the same form, but only includes values for CPU to +memory activity. + ========== NUMA Cache ==========
Try to make minimal changes to the document which already describes access class 0 in a generic fashion (including IO initiatiors that are not CPUs). Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> --- Documentation/admin-guide/mm/numaperf.rst | 8 ++++++++ 1 file changed, 8 insertions(+)