| Message ID | 1576288475-7606-1-git-send-email-vbadigan@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [V2] arm64: dts: qcom: sc7180: Add nodes for eMMC and SD card | expand |
On Sat, Dec 14, 2019 at 07:24:34AM +0530, Veerabhadrarao Badiganti wrote: > Add sdhc instances for supporting eMMC and SD-card on sc7180. > The regulators should be in HPM state for proper functionality of > eMMC and SD-card. Updating corresponding regulators accordingly. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> The patch doesn't apply against qcom/for-next, looks like you need to rebase it. > --- > > This depends on the patch series (dt support for sc7180): > https://lkml.org/lkml/2019/11/8/149 > Also depends on documentation commit 2078158 (Present on mmc-next) > > Changes since V1: > - Updated the regulator min, max voltages as per > eMMC/SD-card voltage requirements > - Enabled IOMMU for eMMC and SD-card. > - Added pull and drive strength to SD-card cd-gpio. > - Incorporated review comments by Matthias Kaehlcke. > --- > arch/arm64/boot/dts/qcom/sc7180-idp.dts | 47 +++++++--- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 148 ++++++++++++++++++++++++++++++++ > 2 files changed, 183 insertions(+), 12 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts > index 189254f..b6d4dc1 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts > +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts > @@ -7,6 +7,7 @@ > > /dts-v1/; > > +#include <dt-bindings/gpio/gpio.h> > #include <dt-bindings/regulator/qcom,rpmh-regulator.h> > #include "sc7180.dtsi" > #include "pm6150.dtsi" > @@ -101,9 +102,9 @@ > }; > > vreg_l12a_1p8: ldo12 { > - regulator-min-microvolt = <1696000>; > - regulator-max-microvolt = <1952000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > > vreg_l13a_1p8: ldo13 { > @@ -143,9 +144,9 @@ > }; > > vreg_l19a_2p9: ldo19 { > - regulator-min-microvolt = <2696000>; > - regulator-max-microvolt = <3304000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <2960000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > }; > > @@ -189,9 +190,9 @@ > }; > > vreg_l6c_2p9: ldo6 { > - regulator-min-microvolt = <2696000>; > - regulator-max-microvolt = <3304000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <2950000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > > vreg_l7c_3p0: ldo7 { > @@ -207,9 +208,9 @@ > }; > > vreg_l9c_2p9: ldo9 { > - regulator-min-microvolt = <2952000>; > - regulator-max-microvolt = <3304000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <2960000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > > vreg_l10c_3p3: ldo10 { > @@ -400,3 +401,25 @@ > bias-pull-up; > }; > }; > + > +&sdhc_1 { > + status = "ok"; > + > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&sdc1_on>; > + pinctrl-1 = <&sdc1_off>; > + vmmc-supply = <&vreg_l19a_2p9>; > + vqmmc-supply = <&vreg_l12a_1p8>; > +}; > + > +&sdhc_2 { > + status = "ok"; > + > + pinctrl-names = "default","sleep"; > + pinctrl-0 = <&sdc2_on>; > + pinctrl-1 = <&sdc2_off>; > + vmmc-supply = <&vreg_l9c_2p9>; > + vqmmc-supply = <&vreg_l6c_2p9>; > + > + cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>; > +}; You are adding these entries to the pinctrl section, they belong above the "/* PINCTRL - additions to nodes defined in sc7180.dtsi */" comment. > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 666e9b9..16de9b8 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -182,6 +182,32 @@ > #power-domain-cells = <1>; > }; > > + sdhc_1: sdhci@7c4000 { > + compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; > + reg = <0 0x7c4000 0 0x1000>; > + reg-names = "hc_mem"; > + > + interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "hc_irq", "pwr_irq"; > + > + clocks = <&gcc GCC_SDCC1_APPS_CLK>, > + <&gcc GCC_SDCC1_AHB_CLK>; > + clock-names = "core", "iface"; > + > + iommus = <&apps_smmu 0x60 0x0>; > + > + bus-width = <8>; > + non-removable; > + > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + mmc-hs400-1_8v; > + mmc-hs400-enhanced-strobe; > + > + status = "disabled"; > + }; > + > qupv3_id_0: geniqup@8c0000 { > compatible = "qcom,geni-se-qup"; > reg = <0 0x008c0000 0 0x6000>; > @@ -897,6 +923,128 @@ > function = "qup15"; > }; > }; > + > + sdc1_on: sdc1-on { > + clk { judging from some other nodes the convention seems to be to call the nodes 'pinconf-<name>'. > + pins = "sdc1_clk"; > + bias-disable; > + drive-strength = <16>; > + }; > + > + cmd { > + pins = "sdc1_cmd"; > + bias-pull-up; > + drive-strength = <10>; > + }; > + > + data { > + pins = "sdc1_data"; > + bias-pull-up; > + drive-strength = <10>; > + }; cmd and data have the same configuration, in theory you could combine them in a single node. Not sure if it's strictly required, in this case with just two pins it doesn't make a big difference. > + > + rclk { > + pins = "sdc1_rclk"; > + bias-pull-down; > + }; > + }; > + > + sdc1_off: sdc1-off { > + clk { > + pins = "sdc1_clk"; > + bias-disable; > + drive-strength = <2>; > + }; > + > + cmd { > + pins = "sdc1_cmd"; > + bias-pull-up; > + drive-strength = <2>; > + }; > + > + data { > + pins = "sdc1_data"; > + bias-pull-up; > + drive-strength = <2>; > + }; > + > + rclk { > + pins = "sdc1_rclk"; > + bias-pull-down; > + }; > + }; > + > + sdc2_on: sdc2_on { nit: sdc2_on: sdc2-on > + clk { > + pins = "sdc2_clk"; > + bias-disable; > + drive-strength = <16>; > + }; > + > + cmd { > + pins = "sdc2_cmd"; > + bias-pull-up; > + drive-strength = <10>; > + }; > + > + data { > + pins = "sdc2_data"; > + bias-pull-up; > + drive-strength = <10>; > + }; > + > + sd-cd { > + pins = "gpio69"; > + bias-pull-up; > + drive-strength = <2>; > + }; > + }; > + > + sdc2_off: sdc2_off { nit: sdc2_off: sdc2-off
On Sat, Dec 14, 2019 at 07:24:34AM +0530, Veerabhadrarao Badiganti wrote: > Add sdhc instances for supporting eMMC and SD-card on sc7180. > The regulators should be in HPM state for proper functionality of > eMMC and SD-card. Updating corresponding regulators accordingly. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> > --- > > This depends on the patch series (dt support for sc7180): > https://lkml.org/lkml/2019/11/8/149 > Also depends on documentation commit 2078158 (Present on mmc-next) > > Changes since V1: > - Updated the regulator min, max voltages as per > eMMC/SD-card voltage requirements > - Enabled IOMMU for eMMC and SD-card. > - Added pull and drive strength to SD-card cd-gpio. > - Incorporated review comments by Matthias Kaehlcke. > --- > arch/arm64/boot/dts/qcom/sc7180-idp.dts | 47 +++++++--- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 148 ++++++++++++++++++++++++++++++++ > 2 files changed, 183 insertions(+), 12 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts > index 189254f..b6d4dc1 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts > +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts > @@ -7,6 +7,7 @@ > > /dts-v1/; > > +#include <dt-bindings/gpio/gpio.h> > #include <dt-bindings/regulator/qcom,rpmh-regulator.h> > #include "sc7180.dtsi" > #include "pm6150.dtsi" > @@ -101,9 +102,9 @@ > }; > > vreg_l12a_1p8: ldo12 { > - regulator-min-microvolt = <1696000>; > - regulator-max-microvolt = <1952000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > > vreg_l13a_1p8: ldo13 { > @@ -143,9 +144,9 @@ > }; > > vreg_l19a_2p9: ldo19 { > - regulator-min-microvolt = <2696000>; > - regulator-max-microvolt = <3304000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <2960000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > }; > > @@ -189,9 +190,9 @@ > }; > > vreg_l6c_2p9: ldo6 { > - regulator-min-microvolt = <2696000>; > - regulator-max-microvolt = <3304000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <2950000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > > vreg_l7c_3p0: ldo7 { > @@ -207,9 +208,9 @@ > }; > > vreg_l9c_2p9: ldo9 { > - regulator-min-microvolt = <2952000>; > - regulator-max-microvolt = <3304000>; > - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + regulator-min-microvolt = <2960000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > }; > > vreg_l10c_3p3: ldo10 { > @@ -400,3 +401,25 @@ > bias-pull-up; > }; > }; > + > +&sdhc_1 { > + status = "ok"; another nit: the DT code is fine with both "okay" and "ok", however the rest of this file uses "okay", so let's be consistent and use the same string in all nodes. > + > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&sdc1_on>; > + pinctrl-1 = <&sdc1_off>; > + vmmc-supply = <&vreg_l19a_2p9>; > + vqmmc-supply = <&vreg_l12a_1p8>; > +}; > + > +&sdhc_2 { > + status = "ok"; ditto
On 12/18/2019 3:51 AM, Matthias Kaehlcke wrote: > On Sat, Dec 14, 2019 at 07:24:34AM +0530, Veerabhadrarao Badiganti wrote: >> Add sdhc instances for supporting eMMC and SD-card on sc7180. >> The regulators should be in HPM state for proper functionality of >> eMMC and SD-card. Updating corresponding regulators accordingly. >> >> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> > The patch doesn't apply against qcom/for-next, looks like you need to > rebase it. > >> --- >> >> This depends on the patch series (dt support for sc7180): >> https://lkml.org/lkml/2019/11/8/149 >> Also depends on documentation commit 2078158 (Present on mmc-next) >> >> Changes since V1: >> - Updated the regulator min, max voltages as per >> eMMC/SD-card voltage requirements >> - Enabled IOMMU for eMMC and SD-card. >> - Added pull and drive strength to SD-card cd-gpio. >> - Incorporated review comments by Matthias Kaehlcke. >> --- >> arch/arm64/boot/dts/qcom/sc7180-idp.dts | 47 +++++++--- >> arch/arm64/boot/dts/qcom/sc7180.dtsi | 148 ++++++++++++++++++++++++++++++++ >> 2 files changed, 183 insertions(+), 12 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts >> index 189254f..b6d4dc1 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts >> +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts >> @@ -7,6 +7,7 @@ >> >> /dts-v1/; >> >> +#include <dt-bindings/gpio/gpio.h> >> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> >> #include "sc7180.dtsi" >> #include "pm6150.dtsi" >> @@ -101,9 +102,9 @@ >> }; >> >> vreg_l12a_1p8: ldo12 { >> - regulator-min-microvolt = <1696000>; >> - regulator-max-microvolt = <1952000>; >> - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> }; >> >> vreg_l13a_1p8: ldo13 { >> @@ -143,9 +144,9 @@ >> }; >> >> vreg_l19a_2p9: ldo19 { >> - regulator-min-microvolt = <2696000>; >> - regulator-max-microvolt = <3304000>; >> - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; >> + regulator-min-microvolt = <2960000>; >> + regulator-max-microvolt = <2960000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> }; >> }; >> >> @@ -189,9 +190,9 @@ >> }; >> >> vreg_l6c_2p9: ldo6 { >> - regulator-min-microvolt = <2696000>; >> - regulator-max-microvolt = <3304000>; >> - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <2950000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> }; >> >> vreg_l7c_3p0: ldo7 { >> @@ -207,9 +208,9 @@ >> }; >> >> vreg_l9c_2p9: ldo9 { >> - regulator-min-microvolt = <2952000>; >> - regulator-max-microvolt = <3304000>; >> - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; >> + regulator-min-microvolt = <2960000>; >> + regulator-max-microvolt = <2960000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> }; >> >> vreg_l10c_3p3: ldo10 { >> @@ -400,3 +401,25 @@ >> bias-pull-up; >> }; >> }; >> + >> +&sdhc_1 { >> + status = "ok"; >> + >> + pinctrl-names = "default", "sleep"; >> + pinctrl-0 = <&sdc1_on>; >> + pinctrl-1 = <&sdc1_off>; >> + vmmc-supply = <&vreg_l19a_2p9>; >> + vqmmc-supply = <&vreg_l12a_1p8>; >> +}; >> + >> +&sdhc_2 { >> + status = "ok"; >> + >> + pinctrl-names = "default","sleep"; >> + pinctrl-0 = <&sdc2_on>; >> + pinctrl-1 = <&sdc2_off>; >> + vmmc-supply = <&vreg_l9c_2p9>; >> + vqmmc-supply = <&vreg_l6c_2p9>; >> + >> + cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>; >> +}; > You are adding these entries to the pinctrl section, they belong > above the "/* PINCTRL - additions to nodes defined in sc7180.dtsi */" > comment. > >> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> index 666e9b9..16de9b8 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> @@ -182,6 +182,32 @@ >> #power-domain-cells = <1>; >> }; >> >> + sdhc_1: sdhci@7c4000 { >> + compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; >> + reg = <0 0x7c4000 0 0x1000>; >> + reg-names = "hc_mem"; >> + >> + interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-names = "hc_irq", "pwr_irq"; >> + >> + clocks = <&gcc GCC_SDCC1_APPS_CLK>, >> + <&gcc GCC_SDCC1_AHB_CLK>; >> + clock-names = "core", "iface"; >> + >> + iommus = <&apps_smmu 0x60 0x0>; >> + >> + bus-width = <8>; >> + non-removable; >> + >> + mmc-ddr-1_8v; >> + mmc-hs200-1_8v; >> + mmc-hs400-1_8v; >> + mmc-hs400-enhanced-strobe; >> + >> + status = "disabled"; >> + }; >> + >> qupv3_id_0: geniqup@8c0000 { >> compatible = "qcom,geni-se-qup"; >> reg = <0 0x008c0000 0 0x6000>; >> @@ -897,6 +923,128 @@ >> function = "qup15"; >> }; >> }; >> + >> + sdc1_on: sdc1-on { >> + clk { > judging from some other nodes the convention seems to be to call the > nodes 'pinconf-<name>'. > >> + pins = "sdc1_clk"; >> + bias-disable; >> + drive-strength = <16>; >> + }; >> + >> + cmd { >> + pins = "sdc1_cmd"; >> + bias-pull-up; >> + drive-strength = <10>; >> + }; >> + >> + data { >> + pins = "sdc1_data"; >> + bias-pull-up; >> + drive-strength = <10>; >> + }; > cmd and data have the same configuration, in theory you could combine > them in a single node. Not sure if it's strictly required, in this case > with just two pins it doesn't make a big difference. Though both have same configuration, each corresponds to different bit fields in register for updating drive-strengths and pull. It configures the right bit field based on pin name. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pinctrl/qcom/pinctrl-sc7180.c?h=v5.5-rc4#n1093 So separate pins needed for cmd and data here. >> + >> + rclk { >> + pins = "sdc1_rclk"; >> + bias-pull-down; >> + }; >> + }; >> + >> + sdc1_off: sdc1-off { >> + clk { >> + pins = "sdc1_clk"; >> + bias-disable; >> + drive-strength = <2>; >> + }; >> + >> + cmd { >> + pins = "sdc1_cmd"; >> + bias-pull-up; >> + drive-strength = <2>; >> + }; >> + >> + data { >> + pins = "sdc1_data"; >> + bias-pull-up; >> + drive-strength = <2>; >> + }; >> + >> + rclk { >> + pins = "sdc1_rclk"; >> + bias-pull-down; >> + }; >> + }; >> + >> + sdc2_on: sdc2_on { > nit: sdc2_on: sdc2-on > >> + clk { >> + pins = "sdc2_clk"; >> + bias-disable; >> + drive-strength = <16>; >> + }; >> + >> + cmd { >> + pins = "sdc2_cmd"; >> + bias-pull-up; >> + drive-strength = <10>; >> + }; >> + >> + data { >> + pins = "sdc2_data"; >> + bias-pull-up; >> + drive-strength = <10>; >> + }; >> + >> + sd-cd { >> + pins = "gpio69"; >> + bias-pull-up; >> + drive-strength = <2>; >> + }; >> + }; >> + >> + sdc2_off: sdc2_off { > nit: sdc2_off: sdc2-off Will incorporate the rest of the changes that you commented. Thanks, Veera
diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts index 189254f..b6d4dc1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include "sc7180.dtsi" #include "pm6150.dtsi" @@ -101,9 +102,9 @@ }; vreg_l12a_1p8: ldo12 { - regulator-min-microvolt = <1696000>; - regulator-max-microvolt = <1952000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; }; vreg_l13a_1p8: ldo13 { @@ -143,9 +144,9 @@ }; vreg_l19a_2p9: ldo19 { - regulator-min-microvolt = <2696000>; - regulator-max-microvolt = <3304000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; }; }; @@ -189,9 +190,9 @@ }; vreg_l6c_2p9: ldo6 { - regulator-min-microvolt = <2696000>; - regulator-max-microvolt = <3304000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; }; vreg_l7c_3p0: ldo7 { @@ -207,9 +208,9 @@ }; vreg_l9c_2p9: ldo9 { - regulator-min-microvolt = <2952000>; - regulator-max-microvolt = <3304000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; }; vreg_l10c_3p3: ldo10 { @@ -400,3 +401,25 @@ bias-pull-up; }; }; + +&sdhc_1 { + status = "ok"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; + vmmc-supply = <&vreg_l19a_2p9>; + vqmmc-supply = <&vreg_l12a_1p8>; +}; + +&sdhc_2 { + status = "ok"; + + pinctrl-names = "default","sleep"; + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; + vmmc-supply = <&vreg_l9c_2p9>; + vqmmc-supply = <&vreg_l6c_2p9>; + + cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 666e9b9..16de9b8 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -182,6 +182,32 @@ #power-domain-cells = <1>; }; + sdhc_1: sdhci@7c4000 { + compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; + reg = <0 0x7c4000 0 0x1000>; + reg-names = "hc_mem"; + + interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_APPS_CLK>, + <&gcc GCC_SDCC1_AHB_CLK>; + clock-names = "core", "iface"; + + iommus = <&apps_smmu 0x60 0x0>; + + bus-width = <8>; + non-removable; + + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + status = "disabled"; + }; + qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x008c0000 0 0x6000>; @@ -897,6 +923,128 @@ function = "qup15"; }; }; + + sdc1_on: sdc1-on { + clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <10>; + }; + + rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_off: sdc1-off { + clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <2>; + }; + + rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc2_on: sdc2_on { + clk { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + + sd-cd { + pins = "gpio69"; + bias-pull-up; + drive-strength = <2>; + }; + }; + + sdc2_off: sdc2_off { + clk { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <2>; + }; + + sd-cd { + pins = "gpio69"; + bias-disable; + drive-strength = <2>; + }; + }; + }; + + sdhc_2: sdhci@8804000 { + compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; + reg = <0 0x08804000 0 0x1000>; + reg-names = "hc_mem"; + + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_APPS_CLK>, + <&gcc GCC_SDCC2_AHB_CLK>; + clock-names = "core", "iface"; + + iommus = <&apps_smmu 0x80 0>; + + bus-width = <4>; + + status = "disabled"; }; qspi: spi@88dc000 {
Add sdhc instances for supporting eMMC and SD-card on sc7180. The regulators should be in HPM state for proper functionality of eMMC and SD-card. Updating corresponding regulators accordingly. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> --- This depends on the patch series (dt support for sc7180): https://lkml.org/lkml/2019/11/8/149 Also depends on documentation commit 2078158 (Present on mmc-next) Changes since V1: - Updated the regulator min, max voltages as per eMMC/SD-card voltage requirements - Enabled IOMMU for eMMC and SD-card. - Added pull and drive strength to SD-card cd-gpio. - Incorporated review comments by Matthias Kaehlcke. --- arch/arm64/boot/dts/qcom/sc7180-idp.dts | 47 +++++++--- arch/arm64/boot/dts/qcom/sc7180.dtsi | 148 ++++++++++++++++++++++++++++++++ 2 files changed, 183 insertions(+), 12 deletions(-)