| Message ID | 20200113220436.2007585-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/pmu: Correct the rc6 offset upon enabling | expand |
Quoting Chris Wilson (2020-01-13 22:04:36) > The rc6 residency starts ticking from 0 from BIOS POST, but the kernel > starts measuring the time from its boot. If we start measuruing > I915_PMU_RC6_RESIDENCY while the GT is idle, we start our sampling from > 0 and then upon first activity (park/unpark) add in all the rc6 > residency since boot. After the first park with the sampler engaged, the > sleep/active counters are aligned. > > Fixes: df6a42053513 ("drm/i915/pmu: Ensure monotonic rc6") > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > drivers/gpu/drm/i915/i915_pmu.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > index 28a82c849bac..fe0f3e0aa4ce 100644 > --- a/drivers/gpu/drm/i915/i915_pmu.c > +++ b/drivers/gpu/drm/i915/i915_pmu.c > @@ -648,6 +648,13 @@ static void i915_pmu_enable(struct perf_event *event) > BUILD_BUG_ON(ARRAY_SIZE(pmu->enable_count) != I915_PMU_MASK_BITS); > GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count)); > GEM_BUG_ON(pmu->enable_count[bit] == ~0); > + > + if (pmu->enable_count[bit] == 0 && > + config_enabled_mask(I915_PMU_RC6_RESIDENCY) & BIT_ULL(bit)) { > + pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(&i915->gt); > + pmu->sleep_last = ktime_get(); I guess strictly we need with_intel_runtime_pm_get {} Good exercise for CI ;) -Chris
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index 28a82c849bac..fe0f3e0aa4ce 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -648,6 +648,13 @@ static void i915_pmu_enable(struct perf_event *event) BUILD_BUG_ON(ARRAY_SIZE(pmu->enable_count) != I915_PMU_MASK_BITS); GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count)); GEM_BUG_ON(pmu->enable_count[bit] == ~0); + + if (pmu->enable_count[bit] == 0 && + config_enabled_mask(I915_PMU_RC6_RESIDENCY) & BIT_ULL(bit)) { + pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(&i915->gt); + pmu->sleep_last = ktime_get(); + } + pmu->enable |= BIT_ULL(bit); pmu->enable_count[bit]++;
The rc6 residency starts ticking from 0 from BIOS POST, but the kernel starts measuring the time from its boot. If we start measuruing I915_PMU_RC6_RESIDENCY while the GT is idle, we start our sampling from 0 and then upon first activity (park/unpark) add in all the rc6 residency since boot. After the first park with the sampler engaged, the sleep/active counters are aligned. Fixes: df6a42053513 ("drm/i915/pmu: Ensure monotonic rc6") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/i915_pmu.c | 7 +++++++ 1 file changed, 7 insertions(+)