| Message ID | 1581743758-4475-5-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add missing UART DCE/DTE pins macro defines | expand |
On Sat, Feb 15, 2020 at 01:15:55PM +0800, Anson Huang wrote: > Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this > is to distinguish the DCE/DTE functions. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > arch/arm/boot/dts/imx6sx-sabreauto.dts | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts > index 315044c..8259244 100644 > --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts > +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts > @@ -229,8 +229,8 @@ > > pinctrl_uart1: uart1grp { > fsl,pins = < > - MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 > - MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1 Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts index 315044c..8259244 100644 --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts @@ -229,8 +229,8 @@ pinctrl_uart1: uart1grp { fsl,pins = < - MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 - MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 + MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1 + MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1 >; };
Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this is to distinguish the DCE/DTE functions. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- arch/arm/boot/dts/imx6sx-sabreauto.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)