| Message ID | 1582161028-2844-5-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [V15,RESEND,1/5] dt-bindings: fsl: scu: add thermal binding | expand |
On Thu, Feb 20, 2020 at 09:10:28AM +0800, Anson Huang wrote: > Add i.MX8QXP CPU thermal zone support. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > No change. > --- > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 36 ++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > index fb5f752..0a14fe4 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > @@ -11,6 +11,7 @@ > #include <dt-bindings/input/input.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/pinctrl/pads-imx8qxp.h> > +#include <dt-bindings/thermal/thermal.h> > > / { > interrupt-parent = <&gic>; > @@ -189,6 +190,11 @@ > compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; > timeout-sec = <60>; > }; > + > + tsens: thermal-sensor { > + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; > + #thermal-sensor-cells = <1>; > + }; > }; > > timer { > @@ -586,4 +592,34 @@ > #clock-cells = <1>; > }; > }; > + > + thermal_zones: thermal-zones { > + cpu-thermal0 { > + polling-delay-passive = <250>; > + polling-delay = <2000>; > + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; > + trips { > + cpu_alert0: trip0 { > + temperature = <107000>; > + hysteresis = <2000>; > + type = "passive"; > + }; May be you can add a 'hot' trip point before 'critical' for future use before reaching the emergency shutdown. > + cpu_crit0: trip1 { > + temperature = <127000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu_alert0>; > + cooling-device = > + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + }; > }; > -- > 2.7.4 >
On Thu, Feb 20, 2020 at 09:10:28AM +0800, Anson Huang wrote: > Add i.MX8QXP CPU thermal zone support. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > No change. > --- > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 36 ++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > index fb5f752..0a14fe4 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > @@ -11,6 +11,7 @@ > #include <dt-bindings/input/input.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/pinctrl/pads-imx8qxp.h> > +#include <dt-bindings/thermal/thermal.h> > > / { > interrupt-parent = <&gic>; > @@ -189,6 +190,11 @@ > compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; > timeout-sec = <60>; > }; > + > + tsens: thermal-sensor { > + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; > + #thermal-sensor-cells = <1>; > + }; > }; > > timer { > @@ -586,4 +592,34 @@ > #clock-cells = <1>; > }; > }; > + > + thermal_zones: thermal-zones { > + cpu-thermal0 { > + polling-delay-passive = <250>; > + polling-delay = <2000>; > + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; > + trips { > + cpu_alert0: trip0 { > + temperature = <107000>; > + hysteresis = <2000>; > + type = "passive"; > + }; Same comment as previous patch. > + cpu_crit0: trip1 { > + temperature = <127000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu_alert0>; > + cooling-device = > + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + }; > }; > -- > 2.7.4 >
Hi, Daniel > Subject: Re: [PATCH V15 RESEND 5/5] arm64: dts: imx: add i.MX8QXP thermal > support > > On Thu, Feb 20, 2020 at 09:10:28AM +0800, Anson Huang wrote: > > Add i.MX8QXP CPU thermal zone support. > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > > --- > > No change. > > --- > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 36 > > ++++++++++++++++++++++++++++++ > > 1 file changed, 36 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > index fb5f752..0a14fe4 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > @@ -11,6 +11,7 @@ > > #include <dt-bindings/input/input.h> > > #include <dt-bindings/interrupt-controller/arm-gic.h> > > #include <dt-bindings/pinctrl/pads-imx8qxp.h> > > +#include <dt-bindings/thermal/thermal.h> > > > > / { > > interrupt-parent = <&gic>; > > @@ -189,6 +190,11 @@ > > compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; > > timeout-sec = <60>; > > }; > > + > > + tsens: thermal-sensor { > > + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc- > thermal"; > > + #thermal-sensor-cells = <1>; > > + }; > > }; > > > > timer { > > @@ -586,4 +592,34 @@ > > #clock-cells = <1>; > > }; > > }; > > + > > + thermal_zones: thermal-zones { > > + cpu-thermal0 { > > + polling-delay-passive = <250>; > > + polling-delay = <2000>; > > + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; > > + trips { > > + cpu_alert0: trip0 { > > + temperature = <107000>; > > + hysteresis = <2000>; > > + type = "passive"; > > + }; > > May be you can add a 'hot' trip point before 'critical' for future use before > reaching the emergency shutdown. The 'passive' trip is actually the 'hot' trip point you mentioned, and I have combined it to below cooling map which will throttle cpu-freq when passive (hot) point is reached. We all use 'passive' as 'hot' alarm and trigger cpu-freq throttle on i.MX platforms. Thanks, Anson > > > + cpu_crit0: trip1 { > > + temperature = <127000>; > > + hysteresis = <2000>; > > + type = "critical"; > > + }; > > + }; > > + cooling-maps { > > + map0 { > > + trip = <&cpu_alert0>; > > + cooling-device = > > + <&A35_0 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > > + <&A35_1 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > > + <&A35_2 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > > + <&A35_3 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > > + }; > > + }; > > + }; > > + }; > > }; > > -- > > 2.7.4 > > > > -- > > > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww. > linaro.org%2F&data=02%7C01%7CAnson.Huang%40nxp.com%7Cd6c0d > 0ce57a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa92cd99c5c301635%7 > C0%7C0%7C637178870951977751&sdata=a7BXeoGKPsYlXmy0sCmA6IM > SbexdiXwZEXAe8o%2BI3j0%3D&reserved=0> Linaro.org │ Open source > software for ARM SoCs > > Follow Linaro: > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww. > facebook.com%2Fpages%2FLinaro&data=02%7C01%7CAnson.Huang%4 > 0nxp.com%7Cd6c0d0ce57a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa9 > 2cd99c5c301635%7C0%7C0%7C637178870951977751&sdata=MVpiED% > 2Blp4h%2FV4EQsMS%2FWT4QvLJYjOZ%2FIpugeO401Vc%3D&reserved= > 0> Facebook | > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Ftwitte > r.com%2F%23!%2Flinaroorg&data=02%7C01%7CAnson.Huang%40nxp.c > om%7Cd6c0d0ce57a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa92cd99 > c5c301635%7C0%7C0%7C637178870951977751&sdata=8sLeSLpoO9TtIsf > jG8hco5a%2FJv5h%2BbDjM4YB43uy%2FF0%3D&reserved=0> Twitter | > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww. > linaro.org%2Flinaro- > blog%2F&data=02%7C01%7CAnson.Huang%40nxp.com%7Cd6c0d0ce57 > a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C > 0%7C637178870951977751&sdata=XL58fpKLCFqOlQWpi7midoItJJsBamij > XFyA2qT%2BwjM%3D&reserved=0> Blog
On 22/02/2020 00:53, Anson Huang wrote: > Hi, Daniel > [ ... ] >>> + >>> + thermal_zones: thermal-zones { >>> + cpu-thermal0 { >>> + polling-delay-passive = <250>; >>> + polling-delay = <2000>; >>> + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; >>> + trips { >>> + cpu_alert0: trip0 { >>> + temperature = <107000>; >>> + hysteresis = <2000>; >>> + type = "passive"; >>> + }; >> >> May be you can add a 'hot' trip point before 'critical' for future use before >> reaching the emergency shutdown. > > The 'passive' trip is actually the 'hot' trip point you mentioned, and I have combined it to > below cooling map which will throttle cpu-freq when passive (hot) point is reached. > We all use 'passive' as 'hot' alarm and trigger cpu-freq throttle on i.MX platforms. Sorry, I'm not sure to get the point. A 'hot' trip point is not a 'passive' trip point. The 'hot' trip point is a critical temperature and a notification is raised [1][2]. It is the last chance for the system to do something before the next trip point 'critical' is reached and where an emergency shutdown is done. The 'passive' trip point is the target temperature for mitigation in a normal situation when the system is loaded. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/thermal/thermal_core.c#n288 [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/thermal/thermal_core.c#n420
Hi, Daniel > Subject: Re: [PATCH V15 RESEND 5/5] arm64: dts: imx: add i.MX8QXP thermal > support > > On 22/02/2020 00:53, Anson Huang wrote: > > Hi, Daniel > > > > [ ... ] > > >>> + > >>> + thermal_zones: thermal-zones { > >>> + cpu-thermal0 { > >>> + polling-delay-passive = <250>; > >>> + polling-delay = <2000>; > >>> + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; > >>> + trips { > >>> + cpu_alert0: trip0 { > >>> + temperature = <107000>; > >>> + hysteresis = <2000>; > >>> + type = "passive"; > >>> + }; > >> > >> May be you can add a 'hot' trip point before 'critical' for future > >> use before reaching the emergency shutdown. > > > > The 'passive' trip is actually the 'hot' trip point you mentioned, and > > I have combined it to below cooling map which will throttle cpu-freq when > passive (hot) point is reached. > > We all use 'passive' as 'hot' alarm and trigger cpu-freq throttle on i.MX > platforms. > > Sorry, I'm not sure to get the point. A 'hot' trip point is not a 'passive' trip > point. The 'hot' trip point is a critical temperature and a notification is raised > [1][2]. > > It is the last chance for the system to do something before the next trip point > 'critical' is reached and where an emergency shutdown is done. > > The 'passive' trip point is the target temperature for mitigation in a normal > situation when the system is loaded. Ah, now I understand your point, as all i.MX SoCs ONLY support passive and critical point, and never support the notification of hot trip point, so I think it should be OK to leave i.MX8QXP same as other i.MX SoCs, if we plan to support hot trip point notification, I will cut another patch for all i.MX SoCs, does it make sense to you? If yes, please help review the V16 patch set I sent out. thanks again for review, Anson > > [1] > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.ker > nel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ftorvalds%2Flinux.git%2F > tree%2Fdrivers%2Fthermal%2Fthermal_core.c%23n288&data=02%7C01 > %7Canson.huang%40nxp.com%7C2a1422c3cb0f46c3b13308d7b76c198c%7C > 686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637179547223360051&a > mp;sdata=fRmsFbCVFdv3VwFEqp1sSHxt2rucQ33yYnnaPE5gs1g%3D&res > erved=0 > [2] > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.ker > nel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ftorvalds%2Flinux.git%2F > tree%2Fdrivers%2Fthermal%2Fthermal_core.c%23n420&data=02%7C01 > %7Canson.huang%40nxp.com%7C2a1422c3cb0f46c3b13308d7b76c198c%7C > 686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637179547223360051&a > mp;sdata=QEiwQcL8FZKg6Rs7y9h9XKvFf%2FlVeo20MwKTiqUbMwA%3D&am > p;reserved=0 > > > > > -- > > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww. > linaro.org%2F&data=02%7C01%7Canson.huang%40nxp.com%7C2a1422 > c3cb0f46c3b13308d7b76c198c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > 0%7C0%7C637179547223360051&sdata=xT2UtNHHA826aziV1aUmPXpa > Bnq7dBm%2FJPFG4S2%2F5qQ%3D&reserved=0> Linaro.org │ Open > source software for ARM SoCs > > Follow Linaro: > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww. > facebook.com%2Fpages%2FLinaro&data=02%7C01%7Canson.huang%4 > 0nxp.com%7C2a1422c3cb0f46c3b13308d7b76c198c%7C686ea1d3bc2b4c6fa9 > 2cd99c5c301635%7C0%7C0%7C637179547223360051&sdata=eSr89jm2 > Qxzpi2bX%2BN%2FchizrkF372ypyLgv5%2BuI82Ic%3D&reserved=0> > Facebook | > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Ftwitte > r.com%2F%23!%2Flinaroorg&data=02%7C01%7Canson.huang%40nxp.c > om%7C2a1422c3cb0f46c3b13308d7b76c198c%7C686ea1d3bc2b4c6fa92cd99 > c5c301635%7C0%7C0%7C637179547223360051&sdata=cRydP%2FJpfuD > uZFXUivk6F4At1lc%2FsOHdSzDDnDtDOug%3D&reserved=0> Twitter | > <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww. > linaro.org%2Flinaro- > blog%2F&data=02%7C01%7Canson.huang%40nxp.com%7C2a1422c3cb0 > f46c3b13308d7b76c198c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 > %7C637179547223360051&sdata=wlwlbrLGXt%2Fdpuvw2xpCToiAIweud > QDvLc8x0kgJOoQ%3D&reserved=0> Blog
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index fb5f752..0a14fe4 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/pinctrl/pads-imx8qxp.h> +#include <dt-bindings/thermal/thermal.h> / { interrupt-parent = <&gic>; @@ -189,6 +190,11 @@ compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; timeout-sec = <60>; }; + + tsens: thermal-sensor { + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; + #thermal-sensor-cells = <1>; + }; }; timer { @@ -586,4 +592,34 @@ #clock-cells = <1>; }; }; + + thermal_zones: thermal-zones { + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; + trips { + cpu_alert0: trip0 { + temperature = <107000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit0: trip1 { + temperature = <127000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; };
Add i.MX8QXP CPU thermal zone support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- No change. --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+)