| Message ID | 1582115313-115667-2-git-send-email-manish.narani@xilinx.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for Xilinx Versal SDHCI in Arasan driver | expand |
On 19. 02. 20 13:28, Manish Narani wrote: > Add documentation for 'xlnx,versal-8.9a' SDHCI controller followed by > example. > > Signed-off-by: Manish Narani <manish.narani@xilinx.com> > --- > .../devicetree/bindings/mmc/arasan,sdhci.txt | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > index 428685eb2ded..630fe707f5c4 100644 > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > @@ -18,6 +18,9 @@ Required Properties: > - "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY > For this device it is strongly suggested to include clock-output-names and > #clock-cells. > + - "xlnx,versal-8.9a": Versal SDHCI 8.9a PHY > + For this device it is strongly suggested to include clock-output-names and > + #clock-cells. > - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY > Note: This binding has been deprecated and moved to [5]. > - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY > @@ -104,6 +107,18 @@ Example: > clk-phase-sd-hs = <63>, <72>; > }; > > + sdhci: mmc@f1040000 { > + compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; > + interrupt-parent = <&gic>; > + interrupts = <0 126 4>; > + reg = <0x0 0xf1040000 0x0 0x10000>; > + clocks = <&clk200>, <&clk200>; > + clock-names = "clk_xin", "clk_ahb"; > + clock-output-names = "clk_out_sd0", "clk_in_sd0"; > + #clock-cells = <1>; > + clk-phase-sd-hs = <132>, <60>; > + }; > + > emmc: sdhci@ec700000 { > compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1"; > reg = <0xec700000 0x300>; > Acked-by: Michal Simek <michal.simek@xilinx.com> Thanks, Michal
On Wed, 19 Feb 2020 17:58:32 +0530, Manish Narani wrote: > Add documentation for 'xlnx,versal-8.9a' SDHCI controller followed by > example. > > Signed-off-by: Manish Narani <manish.narani@xilinx.com> > --- > .../devicetree/bindings/mmc/arasan,sdhci.txt | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index 428685eb2ded..630fe707f5c4 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -18,6 +18,9 @@ Required Properties: - "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY For this device it is strongly suggested to include clock-output-names and #clock-cells. + - "xlnx,versal-8.9a": Versal SDHCI 8.9a PHY + For this device it is strongly suggested to include clock-output-names and + #clock-cells. - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY Note: This binding has been deprecated and moved to [5]. - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY @@ -104,6 +107,18 @@ Example: clk-phase-sd-hs = <63>, <72>; }; + sdhci: mmc@f1040000 { + compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; + interrupt-parent = <&gic>; + interrupts = <0 126 4>; + reg = <0x0 0xf1040000 0x0 0x10000>; + clocks = <&clk200>, <&clk200>; + clock-names = "clk_xin", "clk_ahb"; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; + #clock-cells = <1>; + clk-phase-sd-hs = <132>, <60>; + }; + emmc: sdhci@ec700000 { compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1"; reg = <0xec700000 0x300>;
Add documentation for 'xlnx,versal-8.9a' SDHCI controller followed by example. Signed-off-by: Manish Narani <manish.narani@xilinx.com> --- .../devicetree/bindings/mmc/arasan,sdhci.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+)