| Message ID | 20200210095600.77894-2-maxime@cerno.tech (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 4c7eeb9af3e41ae7d840977119c58f3bbb3f4f59 |
| Headers | show |
| Series | [1/2] arm64: dts: allwinner: h5: Fix PMU compatible | expand |
On Mon, Feb 10, 2020 at 10:56:00AM +0100, Maxime Ripard wrote: > The commit 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") > introduced support for the PMU found on the Allwinner H6. However, the > binding only allows for a single compatible, while the patch was adding > two. > > Make sure we follow the binding. > > Fixes: 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") > Signed-off-by: Maxime Ripard <maxime@cerno.tech> Applied both Maxime
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 3329283e38ab..06363c1bea3f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -70,8 +70,7 @@ ext_osc32k: ext_osc32k_clk { }; pmu { - compatible = "arm,cortex-a53-pmu", - "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
The commit 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") introduced support for the PMU found on the Allwinner H6. However, the binding only allows for a single compatible, while the patch was adding two. Make sure we follow the binding. Fixes: 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)