| Message ID | 20200225171125.28885-21-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Proper dbuf global state | expand |
On Tue, 2020-02-25 at 19:11 +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Make sure the dbuf slice mask for any individual pipe has no > holes between the slices. > > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 7edac506d343..fa39ab0b1223 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3827,6 +3827,14 @@ static int intel_dbuf_slice_size(struct > drm_i915_private *dev_priv) > INTEL_INFO(dev_priv)->num_supported_dbuf_slices; > } > > +static bool bitmask_is_contiguous(unsigned int bitmask) > +{ > + if (bitmask) > + bitmask >>= ffs(bitmask) - 1; > + > + return is_power_of_2(bitmask + 1); > +} > + Well, I guess we just don't trust BSpec tables here :) Shouldn't this be already taken care of by the actual tables, which we anyway seem have to encode "as is". Moreover, I wouldn't even be sure that one day, they won't come up with that you can have gaps for those, anyway currently we don't have them according to current tables Stan > static void > skl_ddb_entry_for_slices(struct drm_i915_private *dev_priv, u8 > slice_mask, > struct skl_ddb_entry *ddb) > @@ -3844,6 +3852,7 @@ skl_ddb_entry_for_slices(struct > drm_i915_private *dev_priv, u8 slice_mask, > > WARN_ON(ddb->start >= ddb->end); > WARN_ON(ddb->end > intel_dbuf_size(dev_priv)); > + WARN_ON(!bitmask_is_contiguous(slice_mask)); > } > > static unsigned int intel_crtc_ddb_weight(const struct > intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 7edac506d343..fa39ab0b1223 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3827,6 +3827,14 @@ static int intel_dbuf_slice_size(struct drm_i915_private *dev_priv) INTEL_INFO(dev_priv)->num_supported_dbuf_slices; } +static bool bitmask_is_contiguous(unsigned int bitmask) +{ + if (bitmask) + bitmask >>= ffs(bitmask) - 1; + + return is_power_of_2(bitmask + 1); +} + static void skl_ddb_entry_for_slices(struct drm_i915_private *dev_priv, u8 slice_mask, struct skl_ddb_entry *ddb) @@ -3844,6 +3852,7 @@ skl_ddb_entry_for_slices(struct drm_i915_private *dev_priv, u8 slice_mask, WARN_ON(ddb->start >= ddb->end); WARN_ON(ddb->end > intel_dbuf_size(dev_priv)); + WARN_ON(!bitmask_is_contiguous(slice_mask)); } static unsigned int intel_crtc_ddb_weight(const struct intel_crtc_state *crtc_state)