| Message ID | 1582545470-11530-1-git-send-email-vbadigan@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [V3] dt-bindings: mmc: sdhci-msm: Add CQE reg map | expand |
Hi, On Mon, Feb 24, 2020 at 3:58 AM Veerabhadrarao Badiganti <vbadigan@codeaurora.org> wrote: > > CQE feature has been enabled on sdhci-msm. Add CQE reg map > and reg names that need to be supplied for supporting CQE feature. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> > --- > Changes since V2: > - Dropped _mem suffix to reg names. > > Changes since V1: > - Updated description for more clarity & Fixed typos. > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) Reviewed-by: Douglas Anderson <dianders@chromium.org> I assume you'll have a follow-up fixing the driver since commit a4080225f51d ("mmc: cqhci: support for command queue enabled host") refers to "cqhci_mem". Also something to keep in mind for future patches (no action needed for this patch): most maintainers frown on making v2 of a patch "In-Reply-To" v1 of a patch. I notice that your v3 was in-reply-to v2 and v2 was in-reply-to v1. You probably don't want to do this. One such reference to people not liking it [1] specifically said "they should not be replies to old versions of that patch; otherwise the threading looks really weird and confusing." [1] https://lore.kernel.org/r/CAJWu+oocs3T8orMNt6AmdVgWONzZg0vD=E8EdvzE9rOi_XatUw@mail.gmail.com -Doug
On Mon, 24 Feb 2020 17:27:50 +0530, Veerabhadrarao Badiganti wrote: > CQE feature has been enabled on sdhci-msm. Add CQE reg map > and reg names that need to be supplied for supporting CQE feature. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> > --- > Changes since V2: > - Dropped _mem suffix to reg names. > > Changes since V1: > - Updated description for more clarity & Fixed typos. > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Mon, 24 Feb 2020 at 12:58, Veerabhadrarao Badiganti <vbadigan@codeaurora.org> wrote: > > CQE feature has been enabled on sdhci-msm. Add CQE reg map > and reg names that need to be supplied for supporting CQE feature. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Applied for next, thanks! Kind regards Uffe > --- > Changes since V2: > - Dropped _mem suffix to reg names. > > Changes since V1: > - Updated description for more clarity & Fixed typos. > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > index 7ee639b..5445931 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > @@ -26,7 +26,13 @@ Required properties: > > - reg: Base address and length of the register in the following order: > - Host controller register map (required) > - - SD Core register map (required for msm-v4 and below) > + - SD Core register map (required for controllers earlier than msm-v5) > + - CQE register map (Optional, CQE support is present on SDHC instance meant > + for eMMC and version v4.2 and above) > +- reg-names: When CQE register map is supplied, below reg-names are required > + - "hc" for Host controller register map > + - "core" for SD core register map > + - "cqhci" for CQE register map > - interrupts: Should contain an interrupt-specifiers for the interrupts: > - Host controller interrupt (required) > - pinctrl-names: Should contain only one value - "default". > -- > Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 7ee639b..5445931 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -26,7 +26,13 @@ Required properties: - reg: Base address and length of the register in the following order: - Host controller register map (required) - - SD Core register map (required for msm-v4 and below) + - SD Core register map (required for controllers earlier than msm-v5) + - CQE register map (Optional, CQE support is present on SDHC instance meant + for eMMC and version v4.2 and above) +- reg-names: When CQE register map is supplied, below reg-names are required + - "hc" for Host controller register map + - "core" for SD core register map + - "cqhci" for CQE register map - interrupts: Should contain an interrupt-specifiers for the interrupts: - Host controller interrupt (required) - pinctrl-names: Should contain only one value - "default".
CQE feature has been enabled on sdhci-msm. Add CQE reg map and reg names that need to be supplied for supporting CQE feature. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> --- Changes since V2: - Dropped _mem suffix to reg names. Changes since V1: - Updated description for more clarity & Fixed typos. --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)