diff mbox series

Use ELF_BASE_PLATFORM to pass ISA level

Message ID 20200301014119.62733-1-syq@debian.org (mailing list archive)
State Superseded
Headers show
Series Use ELF_BASE_PLATFORM to pass ISA level | expand

Commit Message

YunQiang Su March 1, 2020, 1:41 a.m. UTC 
Some userland application/program runtime/dynamic loaded need to
know about the current ISA level to use the best runtime.
While kernel doesn't provides this info.

ELF_PLATFORM only provides some info about the CPU, with very few info,
for example, the value is "mips" for both 24Kc and P6600.

Currently ELF_BASE_PLATFORM is not used by MIPS (only by powerpc).
So we cant set its value as:
  mips2, mips3, mips4, mips5,
  mips32, mips32r2, mips32r6
  mips64, mips64r2, mips64r6
Then in userland, we can get it by:
  getauxval(AT_BASE_PLATFORM)

The only problem is that it seems has different defination than ppc:
  on ppc, it is the mircoarchitecture
while now we use it as ISA level on MIPS.
---
 arch/mips/include/asm/elf.h  |  3 +++
 arch/mips/kernel/cpu-probe.c | 18 ++++++++++++++++++
 2 files changed, 21 insertions(+)

Comments

Jiaxun Yang March 2, 2020, 2:04 a.m. UTC | #1 
于 2020年3月1日 GMT+08:00 上午9:41:19, YunQiang Su <syq@debian.org> 写到:
>Some userland application/program runtime/dynamic loaded need to
>know about the current ISA level to use the best runtime.
>While kernel doesn't provides this info.
>
>ELF_PLATFORM only provides some info about the CPU, with very few info,
>for example, the value is "mips" for both 24Kc and P6600.
>
>Currently ELF_BASE_PLATFORM is not used by MIPS (only by powerpc).
>So we cant set its value as:
>  mips2, mips3, mips4, mips5,
>  mips32, mips32r2, mips32r6
>  mips64, mips64r2, mips64r6
>Then in userland, we can get it by:
>  getauxval(AT_BASE_PLATFORM)
>
>The only problem is that it seems has different defination than ppc:
>  on ppc, it is the mircoarchitecture
>while now we use it as ISA level on MIPS.

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

It helps a lot.

Btw: You forgot your signoff.

>---
> arch/mips/include/asm/elf.h  |  3 +++
> arch/mips/kernel/cpu-probe.c | 18 ++++++++++++++++++
> 2 files changed, 21 insertions(+)
>
>diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
>index f8f44b1a6cbb..5aa29ced6970 100644
>--- a/arch/mips/include/asm/elf.h
>+++ b/arch/mips/include/asm/elf.h
>@@ -445,6 +445,9 @@ extern unsigned int elf_hwcap;
> #define ELF_PLATFORM  __elf_platform
> extern const char *__elf_platform;
> 
>+#define ELF_BASE_PLATFORM  __elf_base_platform
>+extern const char *__elf_base_platform;
>+
> /*
>  * See comments in asm-alpha/elf.h, this is the same thing
>  * on the MIPS.
>diff --git a/arch/mips/kernel/cpu-probe.c
>b/arch/mips/kernel/cpu-probe.c
>index 6ab6b03d35ba..925cc1c9bb04 100644
>--- a/arch/mips/kernel/cpu-probe.c
>+++ b/arch/mips/kernel/cpu-probe.c
>@@ -513,6 +513,13 @@ static inline void set_elf_platform(int cpu, const
>char *plat)
> 		__elf_platform = plat;
> }
> 
>+static inline void set_elf_base_platform(const char *plat)
>+{
>+	if(__elf_base_platform == NULL) {
>+		__elf_base_platform = plat;
>+	}
>+}
>+
> static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
> {
> #ifdef __NEED_VMBITS_PROBE
>@@ -527,36 +534,46 @@ static void set_isa(struct cpuinfo_mips *c,
>unsigned int isa)
> 	switch (isa) {
> 	case MIPS_CPU_ISA_M64R2:
> 		c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2;
>+		set_elf_base_platform("mips64r2");
> 		/* fall through */
> 	case MIPS_CPU_ISA_M64R1:
> 		c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1;
>+		set_elf_base_platform("mips64");
> 		/* fall through */
> 	case MIPS_CPU_ISA_V:
> 		c->isa_level |= MIPS_CPU_ISA_V;
>+		set_elf_base_platform("mips5");
> 		/* fall through */
> 	case MIPS_CPU_ISA_IV:
> 		c->isa_level |= MIPS_CPU_ISA_IV;
>+		set_elf_base_platform("mips4");
> 		/* fall through */
> 	case MIPS_CPU_ISA_III:
> 		c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
>+		set_elf_base_platform("mips3");
> 		break;
> 
> 	/* R6 incompatible with everything else */
> 	case MIPS_CPU_ISA_M64R6:
> 		c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6;
>+		set_elf_base_platform("mips64r6");
> 		/* fall through */
> 	case MIPS_CPU_ISA_M32R6:
> 		c->isa_level |= MIPS_CPU_ISA_M32R6;
>+		set_elf_base_platform("mips32r6");
> 		/* Break here so we don't add incompatible ISAs */
> 		break;
> 	case MIPS_CPU_ISA_M32R2:
> 		c->isa_level |= MIPS_CPU_ISA_M32R2;
>+		set_elf_base_platform("mips32r2");
> 		/* fall through */
> 	case MIPS_CPU_ISA_M32R1:
> 		c->isa_level |= MIPS_CPU_ISA_M32R1;
>+		set_elf_base_platform("mips32");
> 		/* fall through */
> 	case MIPS_CPU_ISA_II:
> 		c->isa_level |= MIPS_CPU_ISA_II;
>+		set_elf_base_platform("mips2");
> 		break;
> 	}
> }
>@@ -2113,6 +2130,7 @@ EXPORT_SYMBOL(__ua_limit);
> 
> const char *__cpu_name[NR_CPUS];
> const char *__elf_platform;
>+const char *__elf_base_platform = NULL;
> 
> void cpu_probe(void)
> {
diff mbox series

Patch

diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index f8f44b1a6cbb..5aa29ced6970 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -445,6 +445,9 @@  extern unsigned int elf_hwcap;
 #define ELF_PLATFORM  __elf_platform
 extern const char *__elf_platform;
 
+#define ELF_BASE_PLATFORM  __elf_base_platform
+extern const char *__elf_base_platform;
+
 /*
  * See comments in asm-alpha/elf.h, this is the same thing
  * on the MIPS.
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 6ab6b03d35ba..925cc1c9bb04 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -513,6 +513,13 @@  static inline void set_elf_platform(int cpu, const char *plat)
 		__elf_platform = plat;
 }
 
+static inline void set_elf_base_platform(const char *plat)
+{
+	if(__elf_base_platform == NULL) {
+		__elf_base_platform = plat;
+	}
+}
+
 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
 {
 #ifdef __NEED_VMBITS_PROBE
@@ -527,36 +534,46 @@  static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
 	switch (isa) {
 	case MIPS_CPU_ISA_M64R2:
 		c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2;
+		set_elf_base_platform("mips64r2");
 		/* fall through */
 	case MIPS_CPU_ISA_M64R1:
 		c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1;
+		set_elf_base_platform("mips64");
 		/* fall through */
 	case MIPS_CPU_ISA_V:
 		c->isa_level |= MIPS_CPU_ISA_V;
+		set_elf_base_platform("mips5");
 		/* fall through */
 	case MIPS_CPU_ISA_IV:
 		c->isa_level |= MIPS_CPU_ISA_IV;
+		set_elf_base_platform("mips4");
 		/* fall through */
 	case MIPS_CPU_ISA_III:
 		c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
+		set_elf_base_platform("mips3");
 		break;
 
 	/* R6 incompatible with everything else */
 	case MIPS_CPU_ISA_M64R6:
 		c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6;
+		set_elf_base_platform("mips64r6");
 		/* fall through */
 	case MIPS_CPU_ISA_M32R6:
 		c->isa_level |= MIPS_CPU_ISA_M32R6;
+		set_elf_base_platform("mips32r6");
 		/* Break here so we don't add incompatible ISAs */
 		break;
 	case MIPS_CPU_ISA_M32R2:
 		c->isa_level |= MIPS_CPU_ISA_M32R2;
+		set_elf_base_platform("mips32r2");
 		/* fall through */
 	case MIPS_CPU_ISA_M32R1:
 		c->isa_level |= MIPS_CPU_ISA_M32R1;
+		set_elf_base_platform("mips32");
 		/* fall through */
 	case MIPS_CPU_ISA_II:
 		c->isa_level |= MIPS_CPU_ISA_II;
+		set_elf_base_platform("mips2");
 		break;
 	}
 }
@@ -2113,6 +2130,7 @@  EXPORT_SYMBOL(__ua_limit);
 
 const char *__cpu_name[NR_CPUS];
 const char *__elf_platform;
+const char *__elf_base_platform = NULL;
 
 void cpu_probe(void)
 {