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[00/11] EDAC/ghes: Cleanup, rework and improvement of memory reporting

Message ID 20200306151318.17422-1-rrichter@marvell.com (mailing list archive)
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Series EDAC/ghes: Cleanup, rework and improvement of memory reporting | expand

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Robert Richter March 6, 2020, 3:13 p.m. UTC 
This series contains a significant cleanup and rework of the ghes
driver and improves the memory reporting as follows:

 * fix of DIMM label in error reports (patch #2),

 * creation of multiple memory controllers to group DIMMs depending on
   the physical memory array (patches #9-#11). This should reflect the
   memory topology of a system in sysfs. Esp. multi-node systems show
   up with one memory controller per node now.

The changes base on the remaining patches that are a general cleanup
and rework:

 * small change to edac_mc, not really dependent on the rest of the
   series (patch #1),

 * general cleanup and rework of the ghes driver (patches #3-#8).

The implementation of multiple memory controllers bases on the
suggestion from James (see patch #11), thank you James for your
valuable input here. The patches are created newly from scratch and
obsolete the GHES part of my previous postings a while ago that have
not been accepted upstream:

 https://lore.kernel.org/patchwork/cover/1093488/

Tested on a Marvell/Cavium ThunderX2 Sabre (dual socket) system.


Robert Richter (11):
  EDAC/mc: Use int type for parameters of edac_mc_alloc()
  EDAC/ghes: Setup DIMM label from DMI and use it in error reports
  EDAC/ghes: Remove local variable rdr_mask in ghes_edac_dmidecode()
  EDAC/ghes: Remove unused members of struct ghes_edac_pvt, rename it to
    ghes_mci
  EDAC/ghes: Cleanup struct ghes_edac_dimm_fill, rename it to
    ghes_dimm_fill
  EDAC/ghes: Carve out MC device handling into separate functions
  EDAC/ghes: Have a separate code path for creating the fake MC
  EDAC/ghes: Carve out code into ghes_edac_register_{one,fake}()
  EDAC/ghes: Implement DIMM mapping table for SMBIOS handles
  EDAC/ghes: Create an own device for each mci
  EDAC/ghes: Create one memory controller per physical memory array

 drivers/edac/edac_mc.c   |   7 +-
 drivers/edac/edac_mc.h   |   6 +-
 drivers/edac/ghes_edac.c | 514 +++++++++++++++++++++++++++++----------
 include/linux/edac.h     |   2 -
 4 files changed, 390 insertions(+), 139 deletions(-)

Comments

Aristeu Rozanski March 10, 2020, 8:18 p.m. UTC | #1 
On Fri, Mar 06, 2020 at 04:13:07PM +0100, Robert Richter wrote:
> This series contains a significant cleanup and rework of the ghes
> driver and improves the memory reporting as follows:
> 
>  * fix of DIMM label in error reports (patch #2),
> 
>  * creation of multiple memory controllers to group DIMMs depending on
>    the physical memory array (patches #9-#11). This should reflect the
>    memory topology of a system in sysfs. Esp. multi-node systems show
>    up with one memory controller per node now.
> 
> The changes base on the remaining patches that are a general cleanup
> and rework:
> 
>  * small change to edac_mc, not really dependent on the rest of the
>    series (patch #1),
> 
>  * general cleanup and rework of the ghes driver (patches #3-#8).
> 
> The implementation of multiple memory controllers bases on the
> suggestion from James (see patch #11), thank you James for your
> valuable input here. The patches are created newly from scratch and
> obsolete the GHES part of my previous postings a while ago that have
> not been accepted upstream:
> 
>  https://lore.kernel.org/patchwork/cover/1093488/
> 
> Tested on a Marvell/Cavium ThunderX2 Sabre (dual socket) system.

Acked-by: Aristeu Rozanski <aris@redhat.com>