| Message ID | 1581932212-19469-4-git-send-email-akashast@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | Convert QUP bindings to YAML and add ICC, pin swap doc | expand |
Hi Akash, I didn't see a patch that implements the binding, did you post it? On Mon, Feb 17, 2020 at 03:06:52PM +0530, Akash Asthana wrote: > Add documentation to support RX/TX/CTS/RTS pin swap in HW. > > Signed-off-by: Akash Asthana <akashast@codeaurora.org> > --- > Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml > index 11530df..7e4b9af 100644 > --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml > @@ -165,6 +165,15 @@ patternProperties: > - description: UART core irq > - description: Wakeup irq (RX GPIO) > > + rx-tx-swap: > + description: RX and TX pins are swap. s/swap/swapped/ > + > + cts-rts-swap: > + description: CTS and RTS pins are swap. s/swap/swapped/ > + > + rx-tx-cts-rts-swap: > + description: RX-TX and CTS-RTS both pairs are swap. I don't think this option adds much value, if both pairs are swapped the above two properties can be set. > + > required: > - compatible > - interrupts > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
Hi Matthias, On 2/19/2020 12:37 AM, Matthias Kaehlcke wrote: > Hi Akash, > > I didn't see a patch that implements the binding, did you post it? We haven't posted any update on patch@ https://patchwork.kernel.org/cover/11313817/ [tty: serial: qcom_geni_serial: Configure UART_IO_MACRO_CTRL register]. We will spin it ASAP. > > > On Mon, Feb 17, 2020 at 03:06:52PM +0530, Akash Asthana wrote: >> Add documentation to support RX/TX/CTS/RTS pin swap in HW. >> >> Signed-off-by: Akash Asthana <akashast@codeaurora.org> >> --- >> Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml >> index 11530df..7e4b9af 100644 >> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml >> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml >> @@ -165,6 +165,15 @@ patternProperties: >> - description: UART core irq >> - description: Wakeup irq (RX GPIO) >> >> + rx-tx-swap: >> + description: RX and TX pins are swap. > s/swap/swapped/ Ok > >> + >> + cts-rts-swap: >> + description: CTS and RTS pins are swap. > s/swap/swapped/ Ok > >> + >> + rx-tx-cts-rts-swap: >> + description: RX-TX and CTS-RTS both pairs are swap. > I don't think this option adds much value, if both pairs are swapped > the above two properties can be set. Yeah ok, It is possible to derive value for rx-tx-cts-rts if above 2 properties are set. > >> + >> required: >> - compatible >> - interrupts >> -- >> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project Thanks for reviewing, Regards, Akash
Hi Akash, The patch that implements the binding landed in tty/tty-next: 9fa3c4b1fa379 tty: serial: qcom_geni_serial: Fix GPIO swapping with workaround The binding needs a re-spin to match the implementation. Thanks Matthias On Wed, Feb 19, 2020 at 06:51:35PM +0530, Akash Asthana wrote: > Hi Matthias, > > On 2/19/2020 12:37 AM, Matthias Kaehlcke wrote: > > Hi Akash, > > > > I didn't see a patch that implements the binding, did you post it? > > We haven't posted any update on patch@ > https://patchwork.kernel.org/cover/11313817/ > > [tty: serial: qcom_geni_serial: Configure UART_IO_MACRO_CTRL register]. We > will spin it ASAP. > > > > > > > On Mon, Feb 17, 2020 at 03:06:52PM +0530, Akash Asthana wrote: > > > Add documentation to support RX/TX/CTS/RTS pin swap in HW. > > > > > > Signed-off-by: Akash Asthana <akashast@codeaurora.org> > > > --- > > > Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 9 +++++++++ > > > 1 file changed, 9 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml > > > index 11530df..7e4b9af 100644 > > > --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml > > > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml > > > @@ -165,6 +165,15 @@ patternProperties: > > > - description: UART core irq > > > - description: Wakeup irq (RX GPIO) > > > + rx-tx-swap: > > > + description: RX and TX pins are swap. > > s/swap/swapped/ > Ok > > > > > + > > > + cts-rts-swap: > > > + description: CTS and RTS pins are swap. > > s/swap/swapped/ > Ok > > > > > + > > > + rx-tx-cts-rts-swap: > > > + description: RX-TX and CTS-RTS both pairs are swap. > > I don't think this option adds much value, if both pairs are swapped > > the above two properties can be set. > > Yeah ok, It is possible to derive value for rx-tx-cts-rts if above 2 > properties are set. > > > > > > + > > > required: > > > - compatible > > > - interrupts > > > -- > > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project > > Thanks for reviewing, > > > Regards, > > Akash > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
On 3/11/2020 3:27 AM, Matthias Kaehlcke wrote: > Hi Akash, > > The patch that implements the binding landed in tty/tty-next: > > 9fa3c4b1fa379 tty: serial: qcom_geni_serial: Fix GPIO swapping with workaround > > The binding needs a re-spin to match the implementation. > > Thanks > > Matthias > Hi Matthias, I will re-spin this binding patches. Regards, Akash > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index 11530df..7e4b9af 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -165,6 +165,15 @@ patternProperties: - description: UART core irq - description: Wakeup irq (RX GPIO) + rx-tx-swap: + description: RX and TX pins are swap. + + cts-rts-swap: + description: CTS and RTS pins are swap. + + rx-tx-cts-rts-swap: + description: RX-TX and CTS-RTS both pairs are swap. + required: - compatible - interrupts
Add documentation to support RX/TX/CTS/RTS pin swap in HW. Signed-off-by: Akash Asthana <akashast@codeaurora.org> --- Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 9 +++++++++ 1 file changed, 9 insertions(+)