[07/14] target/riscv/cpu: Restrict CPU migration to system-mode

Commit Message

Philippe Mathieu-Daudé March 13, 2020, 6:36 p.m. UTC

Signed-off-by: Philippe Mathieu-Daudé <[e-mail]>
---
 target/riscv/cpu.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Alistair Francis March 13, 2020, 8:01 p.m. UTC | #1

On Fri, Mar 13, 2020 at 11:39 AM Philippe Mathieu-Daudé
<[e-mail]> wrote:
>
> Signed-off-by: Philippe Mathieu-Daudé <[e-mail]>

Reviewed-by: Alistair Francis <[e-mail]>

Alistair

> ---
>  target/riscv/cpu.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index c0b7023100..b59e09209e 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -475,10 +475,12 @@ static void riscv_cpu_init(Object *obj)
>      cpu_set_cpustate_pointers(cpu);
>  }
>
> +#ifndef CONFIG_USER_ONLY
>  static const VMStateDescription vmstate_riscv_cpu = {
>      .name = "cpu",
>      .unmigratable = 1,
>  };
> +#endif
>
>  static Property riscv_cpu_properties[] = {
>      DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
> @@ -534,13 +536,13 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
>      cc->do_transaction_failed = riscv_cpu_do_transaction_failed;
>      cc->do_unaligned_access = riscv_cpu_do_unaligned_access;
>      cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug;
> +    /* For now, mark unmigratable: */
> +    cc->vmsd = &vmstate_riscv_cpu;
>  #endif
>  #ifdef CONFIG_TCG
>      cc->tcg_initialize = riscv_translate_init;
>      cc->tlb_fill = riscv_cpu_tlb_fill;
>  #endif
> -    /* For now, mark unmigratable: */
> -    cc->vmsd = &vmstate_riscv_cpu;
>      device_class_set_props(dc, riscv_cpu_properties);
>  }
>
> --
> 2.21.1
>
>

Richard Henderson March 15, 2020, 8:18 p.m. UTC | #2

On 3/13/20 11:36 AM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <[e-mail]>
> ---
>  target/riscv/cpu.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <[e-mail]>

r~

Patch

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index c0b7023100..b59e09209e 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -475,10 +475,12 @@  static void riscv_cpu_init(Object *obj)
     cpu_set_cpustate_pointers(cpu);
 }
 
+#ifndef CONFIG_USER_ONLY
 static const VMStateDescription vmstate_riscv_cpu = {
     .name = "cpu",
     .unmigratable = 1,
 };
+#endif
 
 static Property riscv_cpu_properties[] = {
     DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
@@ -534,13 +536,13 @@  static void riscv_cpu_class_init(ObjectClass *c, void *data)
     cc->do_transaction_failed = riscv_cpu_do_transaction_failed;
     cc->do_unaligned_access = riscv_cpu_do_unaligned_access;
     cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug;
+    /* For now, mark unmigratable: */
+    cc->vmsd = &vmstate_riscv_cpu;
 #endif
 #ifdef CONFIG_TCG
     cc->tcg_initialize = riscv_translate_init;
     cc->tlb_fill = riscv_cpu_tlb_fill;
 #endif
-    /* For now, mark unmigratable: */
-    cc->vmsd = &vmstate_riscv_cpu;
     device_class_set_props(dc, riscv_cpu_properties);
 }